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Searched defs:Def (Results 1 – 25 of 201) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/TableGen/
H A DDirectiveEmitter.h77 explicit BaseRecord(const llvm::Record *Def) : Def(Def) {} in BaseRecord()
107 explicit Directive(const llvm::Record *Def) : BaseRecord(Def) {} in Directive()
130 explicit Clause(const llvm::Record *Def) : BaseRecord(Def) {} in Clause()
198 explicit VersionedClause(const llvm::Record *Def) : Def(Def) {} in VersionedClause()
213 explicit ClauseVal(const llvm::Record *Def) : BaseRecord(Def) {} in ClauseVal()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DReachingDefAnalysis.cpp168 int Def = Incoming[Unit]; in reprocessBasicBlock() local
253 for (int Def : RegUnitDefs) { in traverse() local
272 for (int Def : MBBReachingDefs[MBBNumber][Unit]) { in getReachingDef() local
330 void ReachingDefAnalysis::getReachingLocalUses(MachineInstr *Def, in getReachingLocalUses()
402 if (auto *Def = getUniqueReachingMIDef(MI, PhysReg)) { in getGlobalReachingDefs() local
429 if (auto *Def = getLocalLiveOutMIDef(MBB, PhysReg)) in getLiveOuts() local
498 if (auto *Def = getLocalLiveOutMIDef(MBB, PhysReg)) in isRegDefinedAfter() local
513 int Def = getReachingDef(MI, PhysReg); in isReachingDefLiveOut() local
537 int Def = getReachingDef(&*Last, PhysReg); in getLocalLiveOutMIDef() local
674 if (MachineInstr *Def = getMIOperand(MI, MO)) in collectKilledOperands() local
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H A DDetectDeadLanes.cpp168 const MachineOperand &Def = MI.getOperand(0); in transferUsedLanes() local
203 const MachineOperand &Def = *MI.defs().begin(); in transferDefinedLanesStep() local
227 const MachineOperand &Def, unsigned OpNum, LaneBitmask DefinedLanes) const { in transferDefinedLanes() argument
274 const MachineOperand &Def = *MRI->def_begin(Reg); in determineInitialDefinedLanes() local
346 const MachineOperand &Def = *UseMI.defs().begin(); in determineInitialUsedLanes() local
432 const MachineOperand &Def = MI.getOperand(0); in isUndefInput() local
474 MachineOperand &Def = *MRI->def_begin(Reg); in computeSubRegisterLaneBitInfo() local
H A DMachineCopyPropagation.cpp179 MCRegister Def = CopyOperands->Destination->getReg().asMCReg(); in clobberRegister() local
233 MCRegister Def = CopyOperands->Destination->getReg().asMCReg(); in trackCopy() local
349 Register Def = CopyOperands->Destination->getReg(); in findLastSeenDefInCopy() local
473 MCRegister Def, const TargetRegisterInfo *TRI, in isNopCopy()
541 Register Def = CopyOperands->Destination->getReg(); in isBackwardPropagatableRegClassCopy() local
773 MCRegister Def = RegDef.asMCReg(); in ForwardCopyPropagateBlock() local
953 Register Def = CopyOperands.Destination->getReg(); in isBackwardPropagatableCopy() local
994 Register Def = CopyOperands->Destination->getReg(); in propagateDefs() local
1093 Register Def = CopyOperands->Destination->getReg(); in BackwardCopyPropagateBlock() local
1248 Register Def = CopyOperands->Destination->getReg(); in EliminateSpillageCopies() local
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/freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/
H A DExegesisEmitter.cpp119 void ExegesisEmitter::emitPfmCountersInfo(const Record &Def, in emitPfmCountersInfo()
202 llvm::any_of(PfmCounterDefs, [](const Record *Def) { in emitPfmCounters()
208 for (const Record *Def : PfmCounterDefs) { in emitPfmCounters() local
219 for (const Record *Def : PfmCounterDefs) in emitPfmCounters() local
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64AdvSIMDScalarPass.cpp209 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform() local
222 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform() local
302 MachineRegisterInfo::def_instr_iterator Def = in transformInstruction() local
321 MachineRegisterInfo::def_instr_iterator Def = in transformInstruction() local
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyRegStackify.cpp256 static bool shouldRematerialize(const MachineInstr &Def, in shouldRematerialize()
268 if (MachineInstr *Def = MRI.getUniqueVRegDef(Reg)) in getVRegDef() local
282 static bool hasOneNonDBGUse(unsigned Reg, MachineInstr *Def, in hasOneNonDBGUse()
312 static bool isSafeToMove(const MachineOperand *Def, const MachineOperand *Use, in isSafeToMove()
521 MachineInstr *Def, MachineBasicBlock &MBB, in moveForSingleUse()
570 unsigned Reg, MachineOperand &Op, MachineInstr &Def, MachineBasicBlock &MBB, in rematerializeCheapDef()
633 unsigned Reg, MachineOperand &Op, MachineInstr *Def, MachineBasicBlock &MBB, in moveAndTeeForMultiUse()
867 MachineOperand *Def = DefI->findRegisterDefOperand(Reg); in runOnMachineFunction() local
H A DWebAssemblyDebugValueManager.h29 MachineInstr *Def; variable
H A DWebAssemblyLowerBrUnless.cpp76 MachineInstr *Def = MRI.getVRegDef(Cond); in runOnMachineFunction() local
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUMemoryUtils.cpp68 bool isReallyAClobber(const Value *Ptr, MemoryDef *Def, AAResults *AA) { in isReallyAClobber()
134 if (MemoryDef *Def = dyn_cast<MemoryDef>(MA)) { in isClobberedInFunction() local
/freebsd-14.2/contrib/llvm-project/llvm/lib/WindowsManifest/
H A DWindowsManifestMerger.cpp125 for (xmlNsPtr Def = Node->nsDef; Def; Def = Def->next) { in search() local
153 if (xmlNsPtr Def = search(HRef, Node)) in searchOrDefine() local
155 if (xmlNsPtr Def = xmlNewNs(Node, HRef, getPrefixForHref(HRef))) in searchOrDefine() local
180 for (xmlNsPtr Def = Node->nsDef; Def; Def = Def->next) { in getNamespaceWithPrefix() local
343 for (xmlNsPtr Def = AdditionalNode->nsDef; Def; Def = Def->next) { in mergeNamespaces() local
599 for (xmlNsPtr Def = Node->nsDef; Def; Def = Def->next) { in checkAndStripPrefixes() local
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVPreLegalizer.cpp138 Register Def = MI.getOperand(0).getReg(); in insertBitcasts() local
195 MachineInstr *Def = Op.isReg() ? MRI.getVRegDef(Op.getReg()) : nullptr; in propagateSPIRVType() local
221 MachineInstr *Def = MRI.getVRegDef(Reg); in insertAssignInstr() local
273 MachineInstr *Def = MRI.getVRegDef(Reg); in generateAssignInstrs() local
281 MachineInstr *Def = MRI.getVRegDef(Reg); in generateAssignInstrs() local
/freebsd-14.2/contrib/llvm-project/clang/lib/Serialization/
H A DASTCommon.cpp306 if (const TagDecl *Def = cast<TagDecl>(DC)->getDefinition()) in getDefinitiveDeclContext() local
334 if (const ObjCProtocolDecl *Def in getDefinitiveDeclContext() local
/freebsd-14.2/contrib/llvm-project/llvm/lib/IR/
H A DDominators.cpp137 const Instruction *Def = dyn_cast<Instruction>(DefV); in dominates() local
174 bool DominatorTree::dominates(const Instruction *Def, in dominates()
269 const Instruction *Def = dyn_cast<Instruction>(DefV); in dominates() local
H A DConvergenceVerifier.cpp39 auto *Def = dyn_cast<Instruction>(Token); in findAndCheckConvergenceTokenUsed() local
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFoldOperands.cpp658 MachineInstr *Def = MRI->getVRegDef(UseReg); in getRegSeqInit() local
715 MachineInstr *Def = MRI->getVRegDef(UseReg); in tryToFoldACImm() local
905 MachineOperand *Def = Defs[I].first; in foldOperand() local
1178 MachineInstr *Def = MRI->getVRegDef(Op.getReg()); in getImmOrMaterializedImm() local
1544 MachineInstr *Def = MRI->getVRegDef(ClampSrc->getReg()); in tryFoldClamp() local
1705 MachineInstr *Def = MRI->getVRegDef(RegOp->getReg()); in tryFoldOMod() local
1744 for (auto &Def : Defs) { in tryFoldRegSequence() local
1784 MachineOperand *Def = Defs[I].first; in tryFoldRegSequence() local
1927 if (MachineInstr *Def = MRI->getVRegDef(Reg)) { in tryFoldPhiAGPR() local
1990 MachineOperand &Def = MI.getOperand(0); in tryFoldLoad() local
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H A DAMDGPUGlobalISelUtils.cpp22 MachineInstr *Def = getDefIgnoringCopies(Reg, MRI); in getBaseWithConstantOffset() local
/freebsd-14.2/contrib/llvm-project/llvm/lib/MCA/
H A DInstruction.cpp201 if (!all_of(getDefs(), [](const WriteState &Def) { return Def.isReady(); })) in updatePending()
218 [](const WriteState &Def) { return !Def.getDependentWrite(); })) in updateDispatched()
/freebsd-14.2/contrib/llvm-project/llvm/lib/TableGen/
H A DJSONBackend.cpp75 if (auto *Def = dyn_cast<DefInit>(&I)) { in translateInit() local
138 auto &Def = *D.second; in run() local
/freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/GlobalISel/
H A DPatterns.h93 const Record *Def; member
286 bool Def = false; variable
373 InstructionPattern *Def = nullptr; member
595 const Record &Def; variable
669 BuiltinPattern(const Record &Def, StringRef Name) in BuiltinPattern()
H A DCombinerUtils.h24 inline bool isSpecificDef(const Init &N, StringRef Def) { in isSpecificDef()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DA15SDOptimizer.cpp200 MachineInstr *Def = Op->getParent(); in eraseInstrWithNoUses() local
302 MachineInstr *Def = MRI->getVRegDef(OpReg); in optimizeSDPattern() local
345 MachineInstr *Def = MRI->getVRegDef(MI->getOperand(1).getReg()); in elideCopies() local
602 MachineInstr *Def = MRI->getVRegDef(I); in runOnInstruction() local
/freebsd-14.2/contrib/llvm-project/clang/lib/Format/
H A DMacroExpander.cpp117 Definition Def; member in clang::format::MacroExpander::DefinitionParser
173 const Definition &Def = OptionalArgs in expand() local
/freebsd-14.2/contrib/llvm-project/llvm/tools/llvm-pdbutil/
H A DMinimalSymbolDumper.cpp601 CVSymbol &CVR, DefRangeFramePointerRelFullScopeSym &Def) { in visitKnownRecord()
607 DefRangeFramePointerRelSym &Def) { in visitKnownRecord()
616 DefRangeRegisterRelSym &Def) { in visitKnownRecord()
644 DefRangeSubfieldRegisterSym &Def) { in visitKnownRecord()
656 DefRangeSubfieldSym &Def) { in visitKnownRecord()
664 Error MinimalSymbolDumper::visitKnownRecord(CVSymbol &CVR, DefRangeSym &Def) { in visitKnownRecord()
/freebsd-14.2/contrib/llvm-project/llvm/lib/ExecutionEngine/Orc/
H A DObjectFileInterface.cpp167 if (auto *Def = COFFSym.getSectionDefinition()) { in getCOFFObjectFileSymbolInfo() local
179 auto Def = ComdatDefs[COFFSym.getSectionNumber()]; in getCOFFObjectFileSymbolInfo() local

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