| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64GlobalISelUtils.cpp | 100 const CmpInst::Predicate P, AArch64CC::CondCode &CondCode, in changeFCMPPredToAArch64CC()
160 const CmpInst::Predicate P, AArch64CC::CondCode &CondCode, in changeVectorFCMPPredToAArch64CC()
|
| H A D | AArch64InstructionSelector.cpp | 1357 AArch64CC::CondCode &CondCode, in changeFPCCToORAArch64CC()
1414 AArch64CC::CondCode &CondCode, in changeFPCCToANDAArch64CC()
5107 AArch64CC::CondCode CondCode; in tryOptSelect() local
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiCondCode.h | 10 enum CondCode { enum
|
| H A D | LanaiInstrInfo.cpp | 520 unsigned CondCode = MI.getOperand(3).getImm(); in optimizeSelect() local
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARC/MCTargetDesc/ |
| H A D | ARCInfo.h | 24 enum CondCode { enum
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.h | 35 enum CondCode { enum
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kInstrInfo.h | 34 enum CondCode { enum
|
| H A D | M68kISelLowering.cpp | 2281 unsigned CondCode = Cond.getConstantOperandVal(0); in LowerSELECT() local
2378 unsigned CondCode = CC->getAsZExtVal(); in LowerSELECT() local
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SpeculationHardening.cpp | 226 MachineBasicBlock &SplitEdgeBB, AArch64CC::CondCode &CondCode, in insertTrackingCode()
247 AArch64CC::CondCode CondCode; in instrumentControlFlow() local
|
| H A D | AArch64ISelLowering.cpp | 2696 unsigned CondCode = MI.getOperand(3).getImm(); in EmitF128CSEL() local
3001 AArch64CC::CondCode &CondCode, in changeFPCCToAArch64CC()
3064 AArch64CC::CondCode &CondCode, in changeFPCCToANDAArch64CC()
3094 AArch64CC::CondCode &CondCode, in changeVectorFPCCToAArch64CC()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsInstPrinter.h | 32 enum CondCode { enum
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VE.h | 42 enum CondCode { enum
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreInstrInfo.cpp | 37 enum CondCode { enum
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/AsmParser/ |
| H A D | LanaiAsmParser.cpp | 1062 LPCC::CondCode CondCode = in splitMnemonic() local
1082 LPCC::CondCode CondCode = LPCC::suffixToLanaiCondCode(Mnemonic); in splitMnemonic() local
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/MSP430/AsmParser/ |
| H A D | MSP430AsmParser.cpp | 334 unsigned CondCode; in parseJccInstruction() local
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 255 enum CondCode { // Meaning (integer) Meaning (floating-point) enum
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86BaseInfo.h | 75 enum CondCode { enum
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelDAGToDAG.cpp | 553 static unsigned getPTXCmpMode(const CondCodeSDNode &CondCode, bool FTZ) { in getPTXCmpMode()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/AsmParser/ |
| H A D | VEAsmParser.cpp | 859 VECC::CondCode CondCode = in parseCC() local
|
| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1506 enum CondCode { enum
|
| H A D | TargetLowering.h | 5382 virtual bool isXAndYEqZeroPreferableToXAndYEqY(ISD::CondCode, EVT) const { in isXAndYEqZeroPreferableToXAndYEqY()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 2049 static void FPCCToARMCC(ISD::CondCode CC, ARMCC::CondCodes &CondCode, in FPCCToARMCC()
4836 ARMCC::CondCodes CondCode = IntCCToARMCC(CC); in getARMCmp() local
5185 static void checkVSELConstraints(ISD::CondCode CC, ARMCC::CondCodes &CondCode, in checkVSELConstraints()
5522 ARMCC::CondCodes CondCode = IntCCToARMCC(CC); in LowerSELECT_CC() local
5539 ARMCC::CondCodes CondCode, CondCode2; in LowerSELECT_CC() local
5684 ARMCC::CondCodes CondCode = IntCCToARMCC(CC); in OptimizeVFPBrcond() local
5718 ARMCC::CondCodes CondCode = in LowerBRCOND() local
5771 ARMCC::CondCodes CondCode = in LowerBR_CC() local
5797 ARMCC::CondCodes CondCode, CondCode2; in LowerBR_CC() local
10519 ARMCC::CondCodes CondCode, CondCode2; in LowerFSETCC() local
|
| H A D | ARMBaseInstrInfo.cpp | 2375 unsigned CondCode = MI.getOperand(3).getImm(); in optimizeSelect() local
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 2871 unsigned BaseOpc, CondCode; in fastLowerIntrinsicCall() local
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 6076 SDValue CondCode = SelectCC(N->getOperand(2), N->getOperand(3), CC, dl); in Select() local
|