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    <title>Changes in cap-exp-aspm-latencies</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>78996f1c - lspci: Decode only supported ASPM exit latencies</title>
        <link>http://172.16.0.5:8080/history/pciutils/tests/cap-exp-aspm-latencies#78996f1c</link>
        <description>lspci: Decode only supported ASPM exit latenciesPer PCIe spec r3.1, sec 7.8.6, the L0s Exit Latency is only valid when L0sis supported, and similarly the L1 Exit Latency is only valid when L1 issupported.Only decode the L0s and L1 Exit Latencies if they are defined.For example, on a device that supports L1 but not L0s, the difference inthe &quot;lspci -vv&quot; output looks like this:-   LnkCap: Port #1, Speed 8GT/s, Width x1, ASPM L1, Exit Latency L0s &lt;1us, L1 &lt;16us+   LnkCap: Port #1, Speed 8GT/s, Width x1, ASPM L1, Exit Latency L1 &lt;16usCorrect the comments on the PCI_EXP_LNKCAP_L0S and PCI_EXP_LNKCAP_L1definitions.Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;

            List of files:
            /pciutils/tests/cap-exp-aspm-latencies</description>
        <pubDate>Fri, 21 Apr 2017 19:32:26 +0000</pubDate>
        <dc:creator>Bjorn Helgaas &lt;bhelgaas@google.com&gt;</dc:creator>
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