Changes in cap-dvsec-cxl

9a07a7f5 - lspci: Add test case for CXL device

Mon, 07 Nov 2022 21:13:18 +0000

lspci: Add test case for CXL deviceAdd requested config space dump of CXL device for testingSigned-off-by: Jaxon Haws List of files: /pciutils/tests/cap-dvsec-cxl

c5db7af4 - lspci: Update tests files with VF 10-Bit Tag Requester

Tue, 09 Mar 2021 13:35:19 +0000

lspci: Update tests files with VF 10-Bit Tag RequesterUpdate the tests files with the new field 10BitTagReqin SR-IOV Capabilities Register.Signed-off-by: Dongdong Liu List of files: /pciutils/tests/cap-dvsec-cxl

8b122188 - CXL: Capability vendor ID changed

Tue, 26 May 2020 20:56:28 +0000

CXL: Capability vendor ID changedUpdate the cap-dvsec-cxl test to match the new vendor ID.Signed-off-by: Sean V Kelley List of files: /pciutils/tests/cap-dvsec-cxl

1d330d67 - Tests: cap-dvsec-cxl had tabs erroneously expanded to spaces

Mon, 25 May 2020 10:25:25 +0000

Tests: cap-dvsec-cxl had tabs erroneously expanded to spaces List of files: /pciutils/tests/cap-dvsec-cxl

bd853ef8 - pciutils: Decode Compute eXpress Link DVSEC

Mon, 20 Apr 2020 22:14:44 +0000

pciutils: Decode Compute eXpress Link DVSECCompute eXpress Link[1] is a new CPU interconnect created withworkload accelerators in mind. The interconnect relies on PCIeelectrical and physical interconnect for communication via a Flex Busport which allows designs to choose between providing PCIe or CXL.This patch introduces basic support for lspci decode of CXL andbuilds upon the existing Designated Vendor-Specific support inlspci through identification of a supporting CXL device using DVSECVendor ID and DVSEC ID.[1] https://www.computeexpresslink.org/Signed-off-by: Sean V Kelley List of files: /pciutils/tests/cap-dvsec-cxl