en Copyright 2015 Java http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp#89b57061 Move TargetRegistry.(h|cpp) from Support to MCThis moves the registry higher in the LLVM library dependency stack.Every client of the target registry needs to link against MC anyway toactually use the target, so we might as well move this out of Support.This allows us to ensure that Support doesn't have includes from MC/*.Differential Revision: https://reviews.llvm.org/D111454 List of files: /llvm-project-15.0.7/llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp Fri, 08 Oct 2021 17:48:15 +0000 Reid Kleckner <rnk@google.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp#bd12ecb8 [AMDGPU] Fix PC register mapping in wave32 modeSummary:The PC_32 DWARF register is for a 32-bit process address space which wedon't implement in AMDGCN; another way of putting this is that the sizeof the PC register is not a function of the wavefront size. If we everimplement a 32-bit process address space we will need to add two moreDwarfFlavours i.e. we will need to represent the product of (wave32,wave64) x (64-bit address space, 32-bit address space).Tags: #llvmDifferential Revision: https://reviews.llvm.org/D76732 List of files: /llvm-project-15.0.7/llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp Tue, 24 Mar 2020 21:24:49 +0000 Scott Linder <Scott.Linder@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp#24698e52 Implement wave32 DWARF register mappingImplement the DWARF register mapping described in llvm/docs/AMDGPUUsage.rst.This enables generating appropriate DWARF register numbers for wave64 andwave32 modes. List of files: /llvm-project-15.0.7/llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp Mon, 23 Mar 2020 10:56:51 +0000 Ram Nalamothu <VenkataRamanaiah.Nalamothu@amd.com>