en Copyright 2015 Java http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected#04fff547 [AMDGPU] Move call clobbered return address registers s[30:31] to callee saved rangeCurrently the return address ABI registers s[30:31], which fall in the callclobbered register range, are added as a live-in on the function entry topreserve its value when we have calls so that it gets saved and restoredaround the calls.But the DWARF unwind information (CFI) needs to track where the return addressresides in a frame and the above approach makes it difficult to track thereturn address when the CFI information is emitted during the frame lowering,due to the involvment of understanding the control flow.This patch moves the return address ABI registers s[30:31] into callee savedregisters range and stops adding live-in for return address registers, so thatthe CFI machinery will know where the return address resides when CSRsave/restore happen during the frame lowering.And doing the above poses an issue that now the return instruction uses undefinedregister `sgpr30_sgpr31`. This is resolved by hiding the return address registeruse by the return instruction through the `SI_RETURN` pseudo instruction, whichdoesn't take any input operands, until the `SI_RETURN` pseudo gets lowered to the`S_SETPC_B64_return` during the `expandPostRAPseudo()`.As an added benefit, this patch simplifies overall return instruction handling.Note: The AMDGPU CFI changes are there only in the downstream code and anotherversion of this patch will be posted for review for the downstream code.Reviewed By: arsenm, ronliebDifferential Revision: https://reviews.llvm.org/D114652 List of files: /llvm-project-15.0.7/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected Mon, 07 Mar 2022 19:39:18 +0000 Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected#8565b6f9 [UpdateLLCTestChecks] Add support for isel debug output in update_llc_test_checks.pyAdd a check on run lines to pick up isel options in llc commands and allowgenerating check lines of isel final output other than assembly. If llc commandline contains -debug-only=isel, update_llc_test_checks.py will try to scrub iseloutput, otherwise, the script will fall back on default behaviour, which is try toscrub assembly output instead.The motivation of this change is to allow usage of update_llc_test_checks.py toautogenerate checks of instruction selection results. In this way, we can detecterrors at an earlier stage before the compilation goes all the way to assembly.It is an example of having some transparency for the stages between IR andassembly. These generated tests are almost like "unit tests" of isel stage.This patch only implements the initial change to differentiate isel output fromassembly output for Lanai. Other targets will not be supported for isel checkgeneration at the moment. Although adding support for it will only requireimplementing the function regex and scrubber for corresponding targets.The Lanai implementation was chosen mainly for the simplicity of demonstratingthe difference between isel checks and asm checks.This patch also do not include the implementation of function prefix, which isrequired for the generated isel checks to pass. I will put up a follow up revisionfor the function prefix change to complete isel support.Reviewed By: FlakebiDifferential Revision: https://reviews.llvm.org/D119368 List of files: /llvm-project-15.0.7/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected Tue, 01 Mar 2022 09:54:24 +0000 Yatao Wang <ningxinr@live.cn>