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    <title>Changes in reduction-small-size.ll</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>be25f52f - [LV] Autogen several tests for ease of update in upcoming change</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll#be25f52f</link>
        <description>[LV] Autogen several tests for ease of update in upcoming change

            List of files:
            /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll</description>
        <pubDate>Wed, 20 Jul 2022 14:17:44 +0000</pubDate>
        <dc:creator>Philip Reames &lt;preames@rivosinc.com&gt;</dc:creator>
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<item>
        <title>2e14900d - [test][NewPM] Use -passes=loop-vectorize instead of -loop-vectorize</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll#2e14900d</link>
        <description>[test][NewPM] Use -passes=loop-vectorize instead of -loop-vectorizeUpdate a bunch of loop-vectorize regression tests to use the new PMsyntax (opt -passes=loop-vectorize) instead of the deprecated legacyPM syntax (opt -loop-vectorize).

            List of files:
            /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll</description>
        <pubDate>Thu, 28 Apr 2022 14:46:00 +0000</pubDate>
        <dc:creator>Bjorn Pettersson &lt;bjorn.a.pettersson@ericsson.com&gt;</dc:creator>
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        <title>112c1c34 - [IVDescriptor] Make sure the sign is included for negative extension.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll#112c1c34</link>
        <description>[IVDescriptor] Make sure the sign is included for negative extension.At the moment, computeRecurrenceType does not include any sign bits inthe maximum bit width. If the value can be negative, this means the signbit will be missing and the sext won&apos;t properly extend the value.If the value can be negative, increment the bitwidth by one to make surethere is at least one sign bit in the result value.Note that the increment is also needed *if* the value is *known* to benegative, as a sign bit needs to be preserved for the sext to work.Note that this at the moment prevents vectorization, because theanalysis computes i1 as type for the recurrence when looking through theAND in lookThroughAnd.Fixes PR51794, PR52485.Reviewed By: spatelDifferential Revision: https://reviews.llvm.org/D113056

            List of files:
            /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll</description>
        <pubDate>Mon, 15 Nov 2021 10:31:07 +0000</pubDate>
        <dc:creator>Florian Hahn &lt;flo@fhahn.com&gt;</dc:creator>
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        <title>30ebdf8a - [LV] Precommit test case from  PR52485.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll#30ebdf8a</link>
        <description>[LV] Precommit test case from  PR52485.

            List of files:
            /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll</description>
        <pubDate>Fri, 12 Nov 2021 16:09:19 +0000</pubDate>
        <dc:creator>Florian Hahn &lt;flo@fhahn.com&gt;</dc:creator>
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        <title>e515d3a4 - [LV] Add test case from PR51794 for over-eager truncation.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll#e515d3a4</link>
        <description>[LV] Add test case from PR51794 for over-eager truncation.This patch adds a test case for PR51794 where reductions are performedon types that are too small.

            List of files:
            /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll</description>
        <pubDate>Tue, 02 Nov 2021 20:17:55 +0000</pubDate>
        <dc:creator>Florian Hahn &lt;flo@fhahn.com&gt;</dc:creator>
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        <title>23c2f2e6 - [LV] Mark increment of main vector loop induction variable as NUW.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll#23c2f2e6</link>
        <description>[LV] Mark increment of main vector loop induction variable as NUW.This patch marks the induction increment of the main induction variableof the vector loop as NUW when not folding the tail.If the tail is not folded, we know that End - Start &gt;= Step (eitherstatically or through the minimum iteration checks). We also know that bothStart % Step == 0 and End % Step == 0. We exit the vector loop if %IV +%Step == %End. Hence we must exit the loop before %IV + %Step unsignedoverflows and we can mark the induction increment as NUW.This should make SCEV return more precise bounds for the created vectorloops, used by later optimizations, like late unrolling.At the moment quite a few tests still need to be updated, but beforedoing so I&apos;d like to get initial feedback to make sure I am not missinganything.Note that this could probably be further improved by using informationfrom the original IV.Attempt of modeling of the assumption in Alive2:https://alive2.llvm.org/ce/z/H_DL_gPart of a set of fixes required for PR50412.Reviewed By: mkazantsevDifferential Revision: https://reviews.llvm.org/D103255

            List of files:
            /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll</description>
        <pubDate>Mon, 07 Jun 2021 08:24:27 +0000</pubDate>
        <dc:creator>Florian Hahn &lt;flo@fhahn.com&gt;</dc:creator>
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        <title>e498be57 - [LV] Strip wrap flags from vectorized reductions</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll#e498be57</link>
        <description>[LV] Strip wrap flags from vectorized reductionsA sequence of additions or multiplications that is known not to wrap, may wrapif it&apos;s order is changed (i.e., reassociated). Therefore when vectorizinginteger sum or product reductions, their no-wrap flags need to be removed.Fixes PR43828Patch by Denis AntrushinDifferential Revision: https://reviews.llvm.org/D69563

            List of files:
            /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll</description>
        <pubDate>Thu, 19 Dec 2019 22:04:49 +0000</pubDate>
        <dc:creator>Ayal Zaks &lt;ayal.zaks@intel.com&gt;</dc:creator>
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        <title>cee313d2 - Revert &quot;Temporarily Revert &quot;Add basic loop fusion pass.&quot;&quot;</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll#cee313d2</link>
        <description>Revert &quot;Temporarily Revert &quot;Add basic loop fusion pass.&quot;&quot;The reversion apparently deleted the test/Transforms directory.Will be re-reverting again.llvm-svn: 358552

            List of files:
            /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll</description>
        <pubDate>Wed, 17 Apr 2019 04:52:47 +0000</pubDate>
        <dc:creator>Eric Christopher &lt;echristo@gmail.com&gt;</dc:creator>
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        <title>a097bc69 - [LV] Use Demanded Bits and ValueTracking for reduction type-shrinking</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll#a097bc69</link>
        <description>[LV] Use Demanded Bits and ValueTracking for reduction type-shrinkingThe type-shrinking logic in reduction detection, although narrow in scope, isalso rather ad-hoc, which has led to bugs (e.g., PR35734). This patch modifiesthe approach to rely on the demanded bits and value tracking analyses, ifavailable. We currently perform type-shrinking separately for reductions andother instructions in the loop. Long-term, we should probably think aboutcomputing minimal bit widths in a more complete way for the loops we want tovectorize.PR35734Differential Revision: https://reviews.llvm.org/D42309llvm-svn: 324195

            List of files:
            /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll</description>
        <pubDate>Sun, 04 Feb 2018 15:42:24 +0000</pubDate>
        <dc:creator>Chad Rosier &lt;mcrosier@codeaurora.org&gt;</dc:creator>
    </item>
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        <title>f4bb480b - [LV] Use correct insertion point when type shrinking reductions</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll#f4bb480b</link>
        <description>[LV] Use correct insertion point when type shrinking reductionsWhen type shrinking reductions, we should insert the truncations and extends atthe end of the loop latch block. Previously, these instructions were insertedat the end of the loop header block. The difference is only a problem for loopswith predicated instructions (e.g., conditional stores and instructions thatmay divide by zero). For these instructions, we create new basic blocks insidethe vectorized loop, which cause the loop header and latch to no longer be thesame block. This should fix PR34687.Reference: https://bugs.llvm.org/show_bug.cgi?id=34687llvm-svn: 314542

            List of files:
            /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll</description>
        <pubDate>Fri, 29 Sep 2017 18:07:39 +0000</pubDate>
        <dc:creator>Matthew Simpson &lt;mssimpso@codeaurora.org&gt;</dc:creator>
    </item>
<item>
        <title>c94f8e29 - [LoopVectorize] Add Support for Small Size Reductions.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll#c94f8e29</link>
        <description>[LoopVectorize] Add Support for Small Size Reductions.Unlike scalar operations, we can perform vector operations on element types thatare smaller than the native integer types. We type-promote scalar operations ifthey are smaller than a native type (e.g., i8 arithmetic is promoted to i32arithmetic on Arm targets). This patch detects and removes type-promotionswithin the reduction detection framework, enabling the vectorization of smallsize reductions.In the legality phase, we look through the ANDs and extensions that InstCombinecreates during promotion, keeping track of the smaller type. In theprofitability phase, we use the smaller type and ignore the ANDs and extensionsin the cost model. Finally, in the code generation phase, we truncate the resultof the reduction to allow InstCombine to rewrite the entire expression in thesmaller type.This fixes PR21369.http://reviews.llvm.org/D12202Patch by Matt Simpson &lt;mssimpso@codeaurora.org&gt;!llvm-svn: 246149

            List of files:
            /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/reduction-small-size.ll</description>
        <pubDate>Thu, 27 Aug 2015 14:12:17 +0000</pubDate>
        <dc:creator>Chad Rosier &lt;mcrosier@codeaurora.org&gt;</dc:creator>
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