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    <title>Changes in optimal-epilog-vectorization-liveout.ll</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>3bebec65 - [VPlan] Model first exit values using VPLiveOut.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll#3bebec65</link>
        <description>[VPlan] Model first exit values using VPLiveOut.This patch introduces a new VPLiveOut subclass of VPUser  to model exit values explicitly. The initial version handles exit values thatare neither part of induction or reduction chains nor first orderrecurrence phis.Fixes #51366, #54867, #55167, #55459Reviewed By: AyalDifferential Revision: https://reviews.llvm.org/D123537

            List of files:
            /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll</description>
        <pubDate>Sat, 21 May 2022 15:01:38 +0000</pubDate>
        <dc:creator>Florian Hahn &lt;flo@fhahn.com&gt;</dc:creator>
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        <title>cd61d4bd - [LV] Do not LoopSimplify/LCSSA after generating main vector loop.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll#cd61d4bd</link>
        <description>[LV] Do not LoopSimplify/LCSSA after generating main vector loop.At the moment LV runs LoopSimplify and reconstructs LCSSA form aftergenerating the main vector loop and before generating the epiloguevector loop.In practice, this adds a new exit block for the scalar loop because themiddle block now also branches to the original exit block of the scalarloop. It also requires adding a new LCSSA phi in the newly created exitblock.This complicates things when modeling exit values in VPlan, because wewould need to update the VPlan for the epilogue loop to update the newlycreated LCSSA phi node.But none of that should be necessary, as all analysis requiringloop-simplify form is already done at this point and LCSSA form of theoriginal loop is not broken.Reviewed By: bmahjourDifferential Revision: https://reviews.llvm.org/D125810

            List of files:
            /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll</description>
        <pubDate>Fri, 20 May 2022 08:58:40 +0000</pubDate>
        <dc:creator>Florian Hahn &lt;flo@fhahn.com&gt;</dc:creator>
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        <title>d92cec4c - [LV] Regenerate check lines for some tests.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll#d92cec4c</link>
        <description>[LV] Regenerate check lines for some tests.Make sure the auto-generated check lines are up-to-date for some files,to reduce the test diff in upcoming changes

            List of files:
            /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll</description>
        <pubDate>Tue, 17 May 2022 16:44:54 +0000</pubDate>
        <dc:creator>Florian Hahn &lt;flo@fhahn.com&gt;</dc:creator>
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        <title>872f7000 - Revert &quot;[NFCI] Regenerate SROA/LoopVectorize test checks&quot;</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll#872f7000</link>
        <description>Revert &quot;[NFCI] Regenerate SROA/LoopVectorize test checks&quot;This reverts commit 14e3450fb57305aa9ff3e9e60687b458e43835c9.

            List of files:
            /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll</description>
        <pubDate>Sun, 03 Apr 2022 23:14:34 +0000</pubDate>
        <dc:creator>D&#225;vid Bolvansk&#253; &lt;david.bolvansky@gmail.com&gt;</dc:creator>
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        <title>a113a582 - [NFCI] Regenerate LoopVectorize test checks</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll#a113a582</link>
        <description>[NFCI] Regenerate LoopVectorize test checks

            List of files:
            /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll</description>
        <pubDate>Sun, 03 Apr 2022 19:55:58 +0000</pubDate>
        <dc:creator>D&#225;vid Bolvansk&#253; &lt;david.bolvansky@gmail.com&gt;</dc:creator>
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        <title>23c2f2e6 - [LV] Mark increment of main vector loop induction variable as NUW.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll#23c2f2e6</link>
        <description>[LV] Mark increment of main vector loop induction variable as NUW.This patch marks the induction increment of the main induction variableof the vector loop as NUW when not folding the tail.If the tail is not folded, we know that End - Start &gt;= Step (eitherstatically or through the minimum iteration checks). We also know that bothStart % Step == 0 and End % Step == 0. We exit the vector loop if %IV +%Step == %End. Hence we must exit the loop before %IV + %Step unsignedoverflows and we can mark the induction increment as NUW.This should make SCEV return more precise bounds for the created vectorloops, used by later optimizations, like late unrolling.At the moment quite a few tests still need to be updated, but beforedoing so I&apos;d like to get initial feedback to make sure I am not missinganything.Note that this could probably be further improved by using informationfrom the original IV.Attempt of modeling of the assumption in Alive2:https://alive2.llvm.org/ce/z/H_DL_gPart of a set of fixes required for PR50412.Reviewed By: mkazantsevDifferential Revision: https://reviews.llvm.org/D103255

            List of files:
            /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll</description>
        <pubDate>Mon, 07 Jun 2021 08:24:27 +0000</pubDate>
        <dc:creator>Florian Hahn &lt;flo@fhahn.com&gt;</dc:creator>
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        <title>a7e2c269 - [LV] Epilogue Vectorization with Optimal Control Flow (Recommit)</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll#a7e2c269</link>
        <description>[LV] Epilogue Vectorization with Optimal Control Flow (Recommit)This is yet another attempt at providing support for epiloguevectorization following discussions raised in RFC http://llvm.1065342.n5.nabble.com/llvm-dev-Proposal-RFC-Epilog-loop-vectorization-tt106322.html#noneand reviews D30247 and D88819.Similar to D88819, this patch achieve epilogue vectorization byexecuting a single vplan twice: once on the main loop and a secondtime on the epilogue loop (using a different VF). However it&apos;s ableto handle more loops, and generates more optimal control flow forcases where the trip count is too small to execute any code in vectorform.Reviewed By: SjoerdMeijerDifferential Revision: https://reviews.llvm.org/D89566

            List of files:
            /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll</description>
        <pubDate>Wed, 02 Dec 2020 15:07:41 +0000</pubDate>
        <dc:creator>Bardia Mahjour &lt;bmahjour@ca.ibm.com&gt;</dc:creator>
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        <title>9c5504ad - [LV] Epilogue Vectorization with Optimal Control Flow</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll#9c5504ad</link>
        <description>[LV] Epilogue Vectorization with Optimal Control FlowThis is yet another attempt at providing support for epiloguevectorization following discussions raised in RFC http://llvm.1065342.n5.nabble.com/llvm-dev-Proposal-RFC-Epilog-loop-vectorization-tt106322.html#noneand reviews D30247 and D88819.Similar to D88819, this patch achieve epilogue vectorization byexecuting a single vplan twice: once on the main loop and a secondtime on the epilogue loop (using a different VF). However it&apos;s ableto handle more loops, and generates more optimal control flow forcases where the trip count is too small to execute any code in vectorform.Reviewed By: SjoerdMeijerDifferential Revision: https://reviews.llvm.org/D89566

            List of files:
            /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll</description>
        <pubDate>Tue, 01 Dec 2020 16:57:16 +0000</pubDate>
        <dc:creator>Bardia Mahjour &lt;bmahjour@ca.ibm.com&gt;</dc:creator>
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