Changes in interleaved-accesses-pred-stores.ll

e6ad9ef4 - [instcombine] Canonicalize constant index type to i64 for extractelement/insertelement

Tue, 14 Dec 2021 00:29:19 +0000

[instcombine] Canonicalize constant index type to i64 for extractelement/insertelementThe basic idea to this is that a) having a single canonical type makes CSE easier, and b) many of our transforms are inconsistent about which types we end up with based on visit order.I'm restricting this to constants as for non-constants, we'd have to decide whether the simplicity was worth extra instructions. For constants, there are no extra instructions.We chose the canonical type as i64 arbitrarily. We might consider changing this to something else in the future if we have cause.Differential Revision: https://reviews.llvm.org/D115387 List of files: /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll

1a18de3d - Autogen a bunch of instcombine and vectorizer tests

Mon, 13 Dec 2021 18:07:28 +0000

Autogen a bunch of instcombine and vectorizer testsDone in advance of D115387. These are all the ones which my local script could handle, there's a couple more which need manual updates. List of files: /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll

278aa65c - [IR] Let IRBuilder's CreateVectorSplat/CreateShuffleVector use poison as placeholder

Thu, 24 Dec 2020 00:33:58 +0000

[IR] Let IRBuilder's CreateVectorSplat/CreateShuffleVector use poison as placeholderThis patch updates IRBuilder to create insertelement/shufflevector using poison as a placeholder.Reviewed By: nikicDifferential Revision: https://reviews.llvm.org/D93793 List of files: /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll

cee313d2 - Revert "Temporarily Revert "Add basic loop fusion pass.""

Wed, 17 Apr 2019 04:52:47 +0000

Revert "Temporarily Revert "Add basic loop fusion pass.""The reversion apparently deleted the test/Transforms directory.Will be re-reverting again.llvm-svn: 358552 List of files: /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll

38bbf81a - recommit 344472 after fixing build failure on ARM and PPC.

Sun, 14 Oct 2018 08:50:06 +0000

recommit 344472 after fixing build failure on ARM and PPC.llvm-svn: 344475 List of files: /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll

5118c68c - revert 344472 due to failures.

Sun, 14 Oct 2018 07:21:20 +0000

revert 344472 due to failures.llvm-svn: 344473 List of files: /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll

81743689 - [IAI,LV] Add support for vectorizing predicated strided accesses using masked

Sun, 14 Oct 2018 07:06:16 +0000

[IAI,LV] Add support for vectorizing predicated strided accesses using maskedinterleave-groupThe vectorizer currently does not attempt to create interleave-groups thatcontain predicated loads/stores; predicated strided accesses can currently bevectorized only using masked gather/scatter or scalarization. This patch makespredicated loads/stores candidates for forming interleave-groups during theLoop-Vectorizer's analysis, and adds the proper support for masked-interleave-groups to the Loop-Vectorizer's planning and transformation stages. The patchalso extends the TTI API to allow querying the cost of masked interleave groups(which each target can control); Targets that support masked vector loads/stores may choose to enable this feature and allow vectorizing predicatedstrided loads/stores using masked wide loads/stores and shuffles.Reviewers: Ayal, hsaito, dcaballe, fhahn, javed.absarReviewed By: AyalDifferential Revision: https://reviews.llvm.org/D53011llvm-svn: 344472 List of files: /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll

8c452d76 - [LV] Test once if vector trip count is zero, instead of twice

Wed, 19 Jul 2017 05:16:39 +0000

[LV] Test once if vector trip count is zero, instead of twiceGenerate a single test to decide if there are enough iterations to jump to thevectorized loop, or else go to the scalar remainder loop. This test compares theScalar Trip Count: if STC < VF * UF go to the scalar loop. IfrequiresScalarEpilogue() holds, at-least one iteration must remain scalar; therest can be used to form vector iterations. So in this case the test checksinstead if (STC - 1) < VF * UF by comparing STC <= VF * UF, and going to thescalar loop if so. Otherwise the vector loop is entered for at-least one vectoriteration.This test covers the case where incrementing the backedge-taken count willoverflow leading to an incorrect trip count of zero. In this (rare) case we willalso avoid the vector loop and jump to the scalar loop.This patch simplifies the existing tests and effectively removes the basic-blockoriginally named "min.iters.checked", leaving the single test in block"vector.ph".Original observation and initial patch by Evgeny Stupachenko.Differential Revision: https://reviews.llvm.org/D34150llvm-svn: 308421 List of files: /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll

a4964f29 - Reapply "[LV] Enable vectorization of loops with conditional stores by default"

Fri, 16 Dec 2016 19:12:02 +0000

Reapply "[LV] Enable vectorization of loops with conditional stores by default"This patch reapplies r289863. The original patch was reverted because itexposed a bug causing the loop vectorizer to crash in the Python runtime onPPC. The underlying issue was fixed with r289958.llvm-svn: 289975 List of files: /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll

48b4e614 - Revert r289863: [LV] Enable vectorization of loops with conditional

Fri, 16 Dec 2016 11:31:39 +0000

Revert r289863: [LV] Enable vectorization of loops with conditionalstores by defaultThis uncovers a crasher in the loop vectorizer on PPC when building thePython runtime. I'll send the testcase to the review thread for theoriginal commit.llvm-svn: 289934 List of files: /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll

6a98bcfe - [LV] Enable vectorization of loops with conditional stores by default

Thu, 15 Dec 2016 20:11:05 +0000

[LV] Enable vectorization of loops with conditional stores by defaultThis patch sets the default value of the "-enable-cond-stores-vec" command lineoption to "true".Differential Revision: https://reviews.llvm.org/D27814llvm-svn: 289863 List of files: /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll

a19d0f2f - [ValueTracking] Teach computeKnownBits about [su]min/max

Sat, 06 Aug 2016 08:16:00 +0000

[ValueTracking] Teach computeKnownBits about [su]min/maxReasoning about a select in terms of a min or max allows us to derive atigher bound on the result.llvm-svn: 277914 List of files: /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll

65ca32b8 - [LV] Allow interleaved accesses in loops with predicated blocks

Thu, 14 Jul 2016 20:59:47 +0000

[LV] Allow interleaved accesses in loops with predicated blocksThis patch allows the formation of interleaved access groups in loopscontaining predicated blocks. However, the predicated accesses are preventedfrom forming groups.Differential Revision: https://reviews.llvm.org/D19694llvm-svn: 275471 List of files: /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll