en Copyright 2015 Java http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/MC/RISCV/debug-valid.s#00dfd4f8 Revert "[RISCV] Remove -riscv-no-aliases in favour of new -M no-aliases"The replacement doesn't work for llc, but it is needed bypatchable-function-entry.ll.This reverts commit aa9a30b83a06e3e5e68e32ea645ec2d9edc27efc. List of files: /llvm-project-15.0.7/llvm/test/MC/RISCV/debug-valid.s Sat, 29 May 2021 14:11:37 +0000 Jessica Clarke <jrtc27@jrtc27.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/MC/RISCV/debug-valid.s#aa9a30b8 [RISCV] Remove -riscv-no-aliases in favour of new -M no-aliasesWhilst here, also remove a couple of unnecessary -o - instances.Reviewed By: MaskRayDifferential Revision: https://reviews.llvm.org/D103201 List of files: /llvm-project-15.0.7/llvm/test/MC/RISCV/debug-valid.s Sat, 29 May 2021 13:57:19 +0000 Jessica Clarke <jrtc27@jrtc27.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/MC/RISCV/debug-valid.s#79702dd3 [RISCV] Add instruction definition for dretSummary:The instruction dret is used to return from debug mode and is defined in theRISC-V debug mode spec.https://github.com/riscv/riscv-opcodes/blob/master/opcodes-systemReviewers: apazos, asb, lenary, luismarquesReviewed By: apazosSubscribers: jfb, hiraditya, rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, sameer.abuasal, evandro, llvm-commitsTags: #llvmDifferential Revision: https://reviews.llvm.org/D78583 List of files: /llvm-project-15.0.7/llvm/test/MC/RISCV/debug-valid.s Fri, 24 Apr 2020 20:15:51 +0000 Pengxuan Zheng <pzheng@quicinc.com>