en Copyright 2015 Java http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/MC/PowerPC/ppc64-errors.s#d6c0ef78 [PowerPC] Handle base load with reservation mnemonicThe Power ISA defined l[bhwdq]arx as both base andextended mnemonics. The base mnemonic takes the EHbit as an operand and the extended mnemonic omitsit, making it implicitly zero. The existingimplementation only handles the base mnemonic whenEH is 1 and internally produces a differentinstruction. There are historical reasons for this.This patch simply removes the limitation introducedby this implementation that disallows the basemnemonic with EH = 0 in the ASM parser.This resolves an issue that prevented some filesin the Linux kernel from being built with-fintegrated-as.Also fix a crash if the value is not an integer immediate. List of files: /llvm-project-15.0.7/llvm/test/MC/PowerPC/ppc64-errors.s Fri, 03 Dec 2021 12:56:29 +0000 Nemanja Ivanovic <nemanja.i.ibm@gmail.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/MC/PowerPC/ppc64-errors.s#49599cb1 [PowerPC] Correct the bit-width definition for some imm operand in td.Summary: The imm operands of some instructions are not defined accurately in td.This is a small patch to correct these definitions.Reviewed By: steven.zhangDifferential Revision: https://reviews.llvm.org/D91603 List of files: /llvm-project-15.0.7/llvm/test/MC/PowerPC/ppc64-errors.s Tue, 08 Dec 2020 03:20:12 +0000 Esme-Yi <esme.yi@ibm.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/MC/PowerPC/ppc64-errors.s#cae3a17a [PowerPC] Generate little-endian object filesAs a first step towards real little-endian code generation, this patchchanges the PowerPC MC layer to actually generate little-endian objectfiles. This involves passing the little-endian flag through the variouslayers, including down to createELFObjectWriter so we actually get basiclittle-endian ELF objects, emitting instructions in little-endian order,and handling fixups and relocations as appropriate for little-endian.The bulk of the patch is to update most test cases in test/MC/PowerPCto verify both big- and little-endian encodings. (The only test cases*not* updated are those that create actual big-endian ABI code, likethe TLS tests.)Note that while the object files are now little-endian, the generatedcode itself is not yet updated, in particular, it still does not adhereto the ELFv2 ABI.llvm-svn: 204634 List of files: /llvm-project-15.0.7/llvm/test/MC/PowerPC/ppc64-errors.s Mon, 24 Mar 2014 18:16:09 +0000 Ulrich Weigand <ulrich.weigand@de.ibm.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/MC/PowerPC/ppc64-errors.s#b822af47 Given target assembler parsers a chance to handle variant expressionsfirst. Use this to turn the PPC modifiers into PPC specific expressions,allowing them to work on constants.llvm-svn: 189400 List of files: /llvm-project-15.0.7/llvm/test/MC/PowerPC/ppc64-errors.s Tue, 27 Aug 2013 20:23:19 +0000 Joerg Sonnenberger <joerg@bec.de> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/MC/PowerPC/ppc64-errors.s#5b427591 [PowerPC] Support @tls in the asm parserThis adds support for the last missing construct to parse TLS-relatedassembler code: add 3, 4, symbol@tlsThe ADD8TLS currently hard-codes the @tls into the assembler string.This cannot be handled by the asm parser, since @tls is parsed asa symbol variant. This patch changes ADD8TLS to have the @tls suffixprinted as symbol variant on output too, which allows us to removethe isCodeGenOnly marker from ADD8TLS. This in turn means that wecan add a AsmOperand to accept @tls marked symbols on input.As a side effect, this means that the fixup_ppc_tlsreg fixup typeis no longer necessary and can be merged into fixup_ppc_nofixup.llvm-svn: 185692 List of files: /llvm-project-15.0.7/llvm/test/MC/PowerPC/ppc64-errors.s Fri, 05 Jul 2013 12:22:36 +0000 Ulrich Weigand <ulrich.weigand@de.ibm.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/MC/PowerPC/ppc64-errors.s#5a02a02b [PowerPC] Accept 17-bit signed immediates for addisThe assembler currently strictly verifies that immediates fors16imm operands are in range (-32768 ... 32767). This matchesthe behaviour of the GNU assembler, with one exception: gasallows, as a special case, operands in an extended range(-65536 .. 65535) for the addis instruction only (and itsextended mnemonic lis).The main reason for this seems to be to allow using unsigned16-bit operands for lis, e.g. like lis %r1, 0xfedc.Since this has been supported by gas for a long time, andassembler source code seen "in the wild" actually exploitsthis feature, this patch adds equivalent support to LLVMfor compatibility reasons.llvm-svn: 184946 List of files: /llvm-project-15.0.7/llvm/test/MC/PowerPC/ppc64-errors.s Wed, 26 Jun 2013 13:49:53 +0000 Ulrich Weigand <ulrich.weigand@de.ibm.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/MC/PowerPC/ppc64-errors.s#640192da [PowerPC] Add assembler parserThis adds assembler parser support to the PowerPC back end.The parser will run for any powerpc-*-* and powerpc64-*-* triples,but was tested only on 64-bit Linux. The supported syntax isintended to be compatible with the GNU assembler.The parser does not yet support all PowerPC instructions, butit does support anything that is generated by LLVM itself.There is no support for testing restricted instruction sets yet,i.e. the parser will always accept any instructions it knows,no matter what feature flags are given.Instruction operands will be checked for validity and errorsgenerated. (Error handling in general could still be improved.)The patch adds a number of test cases to verify instructionand operand encodings. The tests currently cover all instructionsfrom the following PowerPC ISA v2.06 Book I facilities:Branch, Fixed-point, Floating-Point, and Vector. Note that a number of these instructions are not yet supportedby the back end; they are marked with FIXME.A number of follow-on check-ins will add extra features. Whenthey are all included, LLVM passes all tests (including bootstrap)when using clang -cc1as as the system assembler.llvm-svn: 181050 List of files: /llvm-project-15.0.7/llvm/test/MC/PowerPC/ppc64-errors.s Fri, 03 May 2013 19:49:39 +0000 Ulrich Weigand <ulrich.weigand@de.ibm.com>