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    <title>Changes in vec_shift4.ll</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>4a36e96c - RegAllocGreedy: Account for reserved registers in num regs heuristic</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll#4a36e96c</link>
        <description>RegAllocGreedy: Account for reserved registers in num regs heuristicThis simple heuristic uses the estimated live range length combinedwith the number of registers in the class to switch which heuristic touse. This was taking the raw number of registers in the class, eventhough not all of them may be available. AMDGPU heavily relies ondynamically reserved numbers of registers based on user attributes tosatisfy occupancy constraints, so the raw number is highly misleading.There are still a few problems here. In the original testcase thatmade me notice this, the live range size is incorrect after thescheduler rearranges instructions, since the instructions don&apos;t havethe original InstrDist offsets. Additionally, I think it would be moreappropriate to use the number of disjointly allocatable registers inthe class. For the AMDGPU register tuples, there are a large number ofregisters in each tuple class, but only a small fraction can actuallybe allocated at the same time since they all overlap with eachother. It seems we do not have a query that corresponds to the numberof independently allocatable registers. Relatedly, I&apos;m still debuggingsome allocation failures where overlapping tuples seem to not behandled correctly.The test changes are mostly noise. There are a handful of x86 teststhat look like regressions with an additional spill, and a handfulthat now avoid a spill. The worst looking regression is likelytest/Thumb2/mve-vld4.ll which introduces a few additionalspills. test/CodeGen/AMDGPU/soft-clause-exceeds-register-budget.llshows a massive improvement by completely eliminating a large numberof spills inside a loop.

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll</description>
        <pubDate>Sat, 21 Aug 2021 18:54:51 +0000</pubDate>
        <dc:creator>Matt Arsenault &lt;Matthew.Arsenault@amd.com&gt;</dc:creator>
    </item>
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        <title>0aef747b - [NFC][X86][Codegen] Megacommit: mass-regenerate all check lines that were already autogenerated</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll#0aef747b</link>
        <description>[NFC][X86][Codegen] Megacommit: mass-regenerate all check lines that were already autogeneratedThe motivation is that the update script has at least two deviations(`&lt;...&gt;@GOT`/`&lt;...&gt;@PLT`/ and not hiding pointer arithmetics) fromwhat pretty much all the checklines were generated with,and most of the tests are still not updated, so each time one of thenon-up-to-date tests is updated to see the effect of the code change,there is a lot of noise. Instead of having to deal with that eachtime, let&apos;s just deal with everything at once.This has been done via:```cd llvm-project/llvm/test/CodeGen/X86grep -rl &quot;; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py&quot; | xargs -L1 &lt;...&gt;/llvm-project/llvm/utils/update_llc_test_checks.py --llc-binary &lt;...&gt;/llvm-project/build/bin/llc```Not all tests were regenerated, however.

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll</description>
        <pubDate>Fri, 11 Jun 2021 20:26:17 +0000</pubDate>
        <dc:creator>Roman Lebedev &lt;lebedev.ri@gmail.com&gt;</dc:creator>
    </item>
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        <title>0248e240 - [X86][update_llc_test_checks] Use a less greedy regular expression for replacing constant pool labels in tests.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll#0248e240</link>
        <description>[X86][update_llc_test_checks] Use a less greedy regular expression for replacing constant pool labels in tests.While working on D97208 I noticed that these greedy regularexpressions prevent tests from failing when (%rip) appears aftera constant pool label when it didn&apos;t before.Reviewed By: RKSimon, pengfeiDifferential Revision: https://reviews.llvm.org/D99460

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll</description>
        <pubDate>Sun, 28 Mar 2021 18:30:49 +0000</pubDate>
        <dc:creator>Craig Topper &lt;craig.topper@sifive.com&gt;</dc:creator>
    </item>
<item>
        <title>990939c8 - [CodeGen][X86] Remove unused check-prefixes from vec tests. NFCI.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll#990939c8</link>
        <description>[CodeGen][X86] Remove unused check-prefixes from vec tests. NFCI.

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll</description>
        <pubDate>Wed, 11 Nov 2020 07:32:08 +0000</pubDate>
        <dc:creator>Wang, Pengfei &lt;pengfei.wang@intel.com&gt;</dc:creator>
    </item>
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        <title>5a855551 - [X86] Regenerate vector shift tests. NFCI.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll#5a855551</link>
        <description>[X86] Regenerate vector shift tests. NFCI.Merge prefixes where possible, use &apos;X86&apos; instead of &apos;X32&apos; (which we try to only use for gnux32 triple tests).

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll</description>
        <pubDate>Tue, 27 Oct 2020 12:13:53 +0000</pubDate>
        <dc:creator>Simon Pilgrim &lt;llvm-dev@redking.me.uk&gt;</dc:creator>
    </item>
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        <title>a2b90112 - Re-enable &quot;[MachineCopyPropagation] Extend pass to do COPY source forwarding&quot;</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll#a2b90112</link>
        <description>Re-enable &quot;[MachineCopyPropagation] Extend pass to do COPY source forwarding&quot;Re-enable commit r323991 now that r325931 has been committed to makeMachineOperand::isRenamable() check more conservative w.r.t. codechanges and opt-in on a per-target basis.llvm-svn: 326208

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll</description>
        <pubDate>Tue, 27 Feb 2018 16:59:10 +0000</pubDate>
        <dc:creator>Geoff Berry &lt;gberry@codeaurora.org&gt;</dc:creator>
    </item>
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        <title>48abac82 - Revert &quot;[MachineCopyPropagation] Extend pass to do COPY source forwarding&quot;</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll#48abac82</link>
        <description>Revert &quot;[MachineCopyPropagation] Extend pass to do COPY source forwarding&quot;This reverts commit r323991.This commit breaks target that don&apos;t model all the register constraintsin TableGen. So far the workaround was to set thehasExtraXXXRegAllocReq, but it proves that it doesn&apos;t cover all thecases.For instance, when mutating an instruction (like in the lowering ofCOPYs) the isRenamable flag is not properly updated. The same problemwill happen when attaching machine operand from one instruction toanother.Geoff Berry is working on a fix in https://reviews.llvm.org/D43042.llvm-svn: 325421

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll</description>
        <pubDate>Sat, 17 Feb 2018 03:05:33 +0000</pubDate>
        <dc:creator>Quentin Colombet &lt;qcolombet@apple.com&gt;</dc:creator>
    </item>
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        <title>94503c7b - [MachineCopyPropagation] Extend pass to do COPY source forwarding</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll#94503c7b</link>
        <description>[MachineCopyPropagation] Extend pass to do COPY source forwardingSummary:This change extends MachineCopyPropagation to do COPY source forwardingand adds an additional run of the pass to the default pass pipeline justafter register allocation.This version of this patch uses the newly addedMachineOperand::isRenamable bit to avoid forwarding registers is such away as to violate constraints that aren&apos;t captured in theMachine IR (e.g. ABI or ISA constraints).This change is a continuation of the work started in D30751.Reviewers: qcolombet, javed.absar, MatzeB, jonpa, tstellarSubscribers: tpr, mgorny, mcrosier, nhaehnle, nemanjai, jyknight, hfinkel, arsenm, inouehrs, eraman, sdardis, guyblank, fedor.sergeev, aheejin, dschuff, jfb, myatsina, llvm-commitsDifferential Revision: https://reviews.llvm.org/D41835llvm-svn: 323991

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll</description>
        <pubDate>Thu, 01 Feb 2018 18:54:01 +0000</pubDate>
        <dc:creator>Geoff Berry &lt;gberry@codeaurora.org&gt;</dc:creator>
    </item>
<item>
        <title>25528d6d - [CodeGen] Unify MBB reference format in both MIR and debug output</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll#25528d6d</link>
        <description>[CodeGen] Unify MBB reference format in both MIR and debug outputAs part of the unification of the debug format and the MIR format, printMBB references as &apos;%bb.5&apos;.The MIR printer prints the IR name of a MBB only for block definitions.* find . \( -name &quot;*.mir&quot; -o -name &quot;*.cpp&quot; -o -name &quot;*.h&quot; -o -name &quot;*.ll&quot; \) -type f -print0 | xargs -0 sed -i &apos;&apos; -E &apos;s/BB#&quot; &lt;&lt; ([a-zA-Z0-9_]+)-&gt;getNumber\(\)/&quot; &lt;&lt; printMBBReference(*\1)/g&apos;* find . \( -name &quot;*.mir&quot; -o -name &quot;*.cpp&quot; -o -name &quot;*.h&quot; -o -name &quot;*.ll&quot; \) -type f -print0 | xargs -0 sed -i &apos;&apos; -E &apos;s/BB#&quot; &lt;&lt; ([a-zA-Z0-9_]+)\.getNumber\(\)/&quot; &lt;&lt; printMBBReference(\1)/g&apos;* find . \( -name &quot;*.txt&quot; -o -name &quot;*.s&quot; -o -name &quot;*.mir&quot; -o -name &quot;*.cpp&quot; -o -name &quot;*.h&quot; -o -name &quot;*.ll&quot; \) -type f -print0 | xargs -0 sed -i &apos;&apos; -E &apos;s/BB#([0-9]+)/%bb.\1/g&apos;* grep -nr &apos;BB#&apos; and fixDifferential Revision: https://reviews.llvm.org/D40422llvm-svn: 319665

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll</description>
        <pubDate>Mon, 04 Dec 2017 17:18:51 +0000</pubDate>
        <dc:creator>Francis Visoiu Mistrih &lt;francisvm@yahoo.com&gt;</dc:creator>
    </item>
<item>
        <title>fabedbad - Revert &quot;Re-enable &quot;[MachineCopyPropagation] Extend pass to do COPY source forwarding&quot;&quot;</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll#fabedbad</link>
        <description>Revert &quot;Re-enable &quot;[MachineCopyPropagation] Extend pass to do COPY source forwarding&quot;&quot;This reverts commit r314729.Another bug has been encountered in an out-of-tree target reported by Quentin.llvm-svn: 314814

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll</description>
        <pubDate>Tue, 03 Oct 2017 16:59:13 +0000</pubDate>
        <dc:creator>Geoff Berry &lt;gberry@codeaurora.org&gt;</dc:creator>
    </item>
<item>
        <title>bfc5fb45 - Re-enable &quot;[MachineCopyPropagation] Extend pass to do COPY source forwarding&quot;</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll#bfc5fb45</link>
        <description>Re-enable &quot;[MachineCopyPropagation] Extend pass to do COPY source forwarding&quot;Issues addressed since original review:- Avoid bug in regalloc greedy/machine verifier when forwarding to use  in an instruction that re-defines the same virtual register.- Fixed bug when forwarding to use in EarlyClobber instruction slot.- Fixed incorrect forwarding to register definitions that showed up in  explicit_uses() iterator (e.g. in INLINEASM).- Moved removal of dead instructions found by  LiveIntervals::shrinkToUses() outside of loop iterating over  instructions to avoid instructions being deleted while pointed to by  iterator.- Fixed ARMLoadStoreOptimizer bug exposed by this change in r311907.- The pass no longer forwards COPYs to physical register uses, since  doing so can break code that implicitly relies on the physical  register number of the use.- The pass no longer forwards COPYs to undef uses, since doing so  can break the machine verifier by creating LiveRanges that don&apos;t  end on a use (since the undef operand is not considered a use).  [MachineCopyPropagation] Extend pass to do COPY source forwarding  This change extends MachineCopyPropagation to do COPY source forwarding.  This change also extends the MachineCopyPropagation pass to be able to  be run during register allocation, after physical registers have been  assigned, but before the virtual registers have been re-written, which  allows it to remove virtual register COPY LiveIntervals that become dead  through the forwarding of all of their uses.llvm-svn: 314729

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll</description>
        <pubDate>Mon, 02 Oct 2017 22:01:37 +0000</pubDate>
        <dc:creator>Geoff Berry &lt;gberry@codeaurora.org&gt;</dc:creator>
    </item>
<item>
        <title>f71bb198 - Revert &quot;Re-enable &quot;[MachineCopyPropagation] Extend pass to do COPY source forwarding&quot;&quot;</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll#f71bb198</link>
        <description>Revert &quot;Re-enable &quot;[MachineCopyPropagation] Extend pass to do COPY source forwarding&quot;&quot;This crashes on boringSSL on PPC (will send reduced testcase)This reverts commit r312328.llvm-svn: 312490

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll</description>
        <pubDate>Mon, 04 Sep 2017 15:47:00 +0000</pubDate>
        <dc:creator>Sam McCall &lt;sam.mccall@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>65528f29 - Re-enable &quot;[MachineCopyPropagation] Extend pass to do COPY source forwarding&quot;</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll#65528f29</link>
        <description>Re-enable &quot;[MachineCopyPropagation] Extend pass to do COPY source forwarding&quot;Issues addressed since original review:- Moved removal of dead instructions found by  LiveIntervals::shrinkToUses() outside of loop iterating over  instructions to avoid instructions being deleted while pointed to by  iterator.- Fixed ARMLoadStoreOptimizer bug exposed by this change in r311907.- The pass no longer forwards COPYs to physical register uses, since  doing so can break code that implicitly relies on the physical  register number of the use.- The pass no longer forwards COPYs to undef uses, since doing so  can break the machine verifier by creating LiveRanges that don&apos;t  end on a use (since the undef operand is not considered a use).  [MachineCopyPropagation] Extend pass to do COPY source forwarding  This change extends MachineCopyPropagation to do COPY source forwarding.  This change also extends the MachineCopyPropagation pass to be able to  be run during register allocation, after physical registers have been  assigned, but before the virtual registers have been re-written, which  allows it to remove virtual register COPY LiveIntervals that become dead  through the forwarding of all of their uses.llvm-svn: 312328

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll</description>
        <pubDate>Fri, 01 Sep 2017 14:27:20 +0000</pubDate>
        <dc:creator>Geoff Berry &lt;gberry@codeaurora.org&gt;</dc:creator>
    </item>
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        <title>24775a0a - Revert r312154 &quot;Re-enable &quot;[MachineCopyPropagation] Extend pass to do COPY source forwarding&quot;&quot;</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll#24775a0a</link>
        <description>Revert r312154 &quot;Re-enable &quot;[MachineCopyPropagation] Extend pass to do COPY source forwarding&quot;&quot;It caused PR34387: Assertion failed: (RegNo &lt; NumRegs &amp;&amp; &quot;Attempting to access record for invalid register number!&quot;)&gt; Issues identified by buildbots addressed since original review:&gt; - Fixed ARMLoadStoreOptimizer bug exposed by this change in r311907.&gt; - The pass no longer forwards COPYs to physical register uses, since&gt;   doing so can break code that implicitly relies on the physical&gt;   register number of the use.&gt; - The pass no longer forwards COPYs to undef uses, since doing so&gt;   can break the machine verifier by creating LiveRanges that don&apos;t&gt;   end on a use (since the undef operand is not considered a use).&gt;&gt;   [MachineCopyPropagation] Extend pass to do COPY source forwarding&gt;&gt;   This change extends MachineCopyPropagation to do COPY source forwarding.&gt;&gt;   This change also extends the MachineCopyPropagation pass to be able to&gt;   be run during register allocation, after physical registers have been&gt;   assigned, but before the virtual registers have been re-written, which&gt;   allows it to remove virtual register COPY LiveIntervals that become dead&gt;   through the forwarding of all of their uses.llvm-svn: 312178

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll</description>
        <pubDate>Wed, 30 Aug 2017 22:11:37 +0000</pubDate>
        <dc:creator>Hans Wennborg &lt;hans@hanshq.net&gt;</dc:creator>
    </item>
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        <title>feffb0c8 - Re-enable &quot;[MachineCopyPropagation] Extend pass to do COPY source forwarding&quot;</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll#feffb0c8</link>
        <description>Re-enable &quot;[MachineCopyPropagation] Extend pass to do COPY source forwarding&quot;Issues identified by buildbots addressed since original review:- Fixed ARMLoadStoreOptimizer bug exposed by this change in r311907.- The pass no longer forwards COPYs to physical register uses, since  doing so can break code that implicitly relies on the physical  register number of the use.- The pass no longer forwards COPYs to undef uses, since doing so  can break the machine verifier by creating LiveRanges that don&apos;t  end on a use (since the undef operand is not considered a use).  [MachineCopyPropagation] Extend pass to do COPY source forwarding  This change extends MachineCopyPropagation to do COPY source forwarding.  This change also extends the MachineCopyPropagation pass to be able to  be run during register allocation, after physical registers have been  assigned, but before the virtual registers have been re-written, which  allows it to remove virtual register COPY LiveIntervals that become dead  through the forwarding of all of their uses.llvm-svn: 312154

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll</description>
        <pubDate>Wed, 30 Aug 2017 18:41:07 +0000</pubDate>
        <dc:creator>Geoff Berry &lt;gberry@codeaurora.org&gt;</dc:creator>
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<item>
        <title>bd47e8a4 - Revert &quot;[MachineCopyPropagation] Extend pass to do COPY source forwarding&quot; round 2</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll#bd47e8a4</link>
        <description>Revert &quot;[MachineCopyPropagation] Extend pass to do COPY source forwarding&quot; round 2This reverts commit r311135.sanitizer-x86_64-linux-android buildbot is timing out with just thispatch applied.llvm-svn: 311142

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll</description>
        <pubDate>Fri, 18 Aug 2017 01:43:11 +0000</pubDate>
        <dc:creator>Geoff Berry &lt;gberry@codeaurora.org&gt;</dc:creator>
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<item>
        <title>51f52c4f - Re-enable &quot;[MachineCopyPropagation] Extend pass to do COPY source forwarding&quot;</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll#51f52c4f</link>
        <description>Re-enable &quot;[MachineCopyPropagation] Extend pass to do COPY source forwarding&quot;    Two issues identified by buildbots were addressed:    - The pass no longer forwards COPYs to physical register uses, since      doing so can break code that implicitly relies on the physical      register number of the use.    - The pass no longer forwards COPYs to undef uses, since doing so      can break the machine verifier by creating LiveRanges that don&apos;t      end on a use (since the undef operand is not considered a use).    [MachineCopyPropagation] Extend pass to do COPY source forwarding    This change extends MachineCopyPropagation to do COPY source forwarding.    This change also extends the MachineCopyPropagation pass to be able to    be run during register allocation, after physical registers have been    assigned, but before the virtual registers have been re-written, which    allows it to remove virtual register COPY LiveIntervals that become dead    through the forwarding of all of their uses.    Reviewers: qcolombet, javed.absar, MatzeB, jonpa    Subscribers: jyknight, nemanjai, llvm-commits, nhaehnle, mcrosier, mgorny    Differential Revision: https://reviews.llvm.org/D30751llvm-svn: 311135

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll</description>
        <pubDate>Thu, 17 Aug 2017 23:06:55 +0000</pubDate>
        <dc:creator>Geoff Berry &lt;gberry@codeaurora.org&gt;</dc:creator>
    </item>
<item>
        <title>4e38e02e - Revert &quot;[MachineCopyPropagation] Extend pass to do COPY source forwarding&quot;</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll#4e38e02e</link>
        <description>Revert &quot;[MachineCopyPropagation] Extend pass to do COPY source forwarding&quot;This reverts commit r311038.Several buildbots are breaking, and at least one appears to be due tothe forwarding of physical regs enabled by this change.  Reverting whileI investigate further.llvm-svn: 311062

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll</description>
        <pubDate>Thu, 17 Aug 2017 04:04:11 +0000</pubDate>
        <dc:creator>Geoff Berry &lt;gberry@codeaurora.org&gt;</dc:creator>
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<item>
        <title>87f8d251 - [MachineCopyPropagation] Extend pass to do COPY source forwarding</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll#87f8d251</link>
        <description>[MachineCopyPropagation] Extend pass to do COPY source forwardingThis change extends MachineCopyPropagation to do COPY source forwarding.This change also extends the MachineCopyPropagation pass to be able tobe run during register allocation, after physical registers have beenassigned, but before the virtual registers have been re-written, whichallows it to remove virtual register COPY LiveIntervals that become deadthrough the forwarding of all of their uses.Reviewers: qcolombet, javed.absar, MatzeB, jonpaSubscribers: jyknight, nemanjai, llvm-commits, nhaehnle, mcrosier, mgornyDifferential Revision: https://reviews.llvm.org/D30751llvm-svn: 311038

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll</description>
        <pubDate>Wed, 16 Aug 2017 20:50:01 +0000</pubDate>
        <dc:creator>Geoff Berry &lt;gberry@codeaurora.org&gt;</dc:creator>
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        <title>d7ae9ab1 - [X86] Fix printing of blendvpd/blendvps/pblendvb to include the implicit %xmm0 argument. This makes codegen output more obvious about the %xmm0 usage.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll#d7ae9ab1</link>
        <description>[X86] Fix printing of blendvpd/blendvps/pblendvb to include the implicit %xmm0 argument. This makes codegen output more obvious about the %xmm0 usage.llvm-svn: 294131

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_shift4.ll</description>
        <pubDate>Sun, 05 Feb 2017 18:33:24 +0000</pubDate>
        <dc:creator>Craig Topper &lt;craig.topper@gmail.com&gt;</dc:creator>
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