Changes in vec_insert-4.ll

cc887240 - [CodeGen] Ensure callers of CreateStackTemporary use sensible alignments

Tue, 02 Jun 2020 10:16:23 +0000

[CodeGen] Ensure callers of CreateStackTemporary use sensible alignmentsIn two instances of CreateStackTemporary we are sometimes promotingalignments beyond the stack alignment. I have introduced a new functioncalled getReducedAlign that will return the alignment for the brokendown parts of illegal vector types. For example, on NEON a <32 x i8>type is made up of two <16 x i8> types - in this case the sensiblealignment is 16 bytes, not 32.In the legalization code wherever we create stack temporaries I havestarted using the reduced alignments instead for illegal vector types.I added a test to CodeGen/AArch64/build-one-lane.llthat tries to insert an element into an illegal fixed vector typethat involves creating a temporary stack object.Differential Revision: https://reviews.llvm.org/D80370 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_insert-4.ll

43e94b15 - Followup on Proposal to move MIR physical register namespace to '$' sigil.

Wed, 31 Jan 2018 22:04:26 +0000

Followup on Proposal to move MIR physical register namespace to '$' sigil.Discussed here:http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.htmlIn preparation for adding support for named vregs we are changing the sigil forphysical registers in MIR to '$' from '%'. This will prevent name clashes ofnamed physical register with named vregs.llvm-svn: 323922 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_insert-4.ll

a8a83d15 - [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.

Thu, 07 Dec 2017 10:40:31 +0000

[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Work towards the unification of MIR and debug output by refactoring theinterfaces.For MachineOperand::print, keep a simple version that can be easily calledfrom `dump()`, and a more complex one which will be called from both theMIRPrinter and MachineInstr::print.Add extra checks inside MachineOperand for detached operands (operandswith getParent() == nullptr).https://reviews.llvm.org/D40836* find . $ -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" $ -type f -print0 | xargs -0 sed -i '' -E 's/kill: ([^ ]+) ([^ ]+) ([^ ]+)/kill: \1 def \2 \3/g'* find . $ -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" $ -type f -print0 | xargs -0 sed -i '' -E 's/kill: ([^ ]+) ([^ ]+) ([^ ]+)/kill: \1 \2 def \3/g'* find . $ -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" $ -type f -print0 | xargs -0 sed -i '' -E 's/kill: def ([^ ]+) ([^ ]+) ([^ ]+)/kill: def \1 \2 def \3/g'* find . $ -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" $ -type f -print0 | xargs -0 sed -i '' -E 's///g'* find . $ -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" $ -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)/killed \1/g'* find . $ -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" $ -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)/implicit killed \1/g'* find . $ -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" $ -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)/dead \1/g'* find . $ -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" $ -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)/dead \1/g'* find . $ -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" $ -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)/implicit-def dead \1/g'* find . $ -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" $ -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)/implicit-def \1/g'* find . $ -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" $ -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)/implicit \1/g'* find . $ -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" $ -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)/internal \1/g'* find . $ -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" $ -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)/undef \1/g'llvm-svn: 320022 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_insert-4.ll

25528d6d - [CodeGen] Unify MBB reference format in both MIR and debug output

Mon, 04 Dec 2017 17:18:51 +0000

[CodeGen] Unify MBB reference format in both MIR and debug outputAs part of the unification of the debug format and the MIR format, printMBB references as '%bb.5'.The MIR printer prints the IR name of a MBB only for block definitions.* find . $ -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" $ -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber/" << printMBBReference(*\1)/g'* find . $ -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" $ -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber/" << printMBBReference(\1)/g'* find . $ -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" $ -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g'* grep -nr 'BB#' and fixDifferential Revision: https://reviews.llvm.org/D40422llvm-svn: 319665 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_insert-4.ll

9d7bb0cb - [CodeGen] Print register names in lowercase in both MIR and debug output

Tue, 28 Nov 2017 17:15:09 +0000

[CodeGen] Print register names in lowercase in both MIR and debug outputAs part of the unification of the debug format and the MIR format,always print registers as lowercase.* Only debug printing is affected. It now follows MIR.Differential Revision: https://reviews.llvm.org/D40417llvm-svn: 319187 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_insert-4.ll

0b382a7c - DAG: Avoid OOB when legalizing vector indexing

Tue, 10 Jan 2017 22:02:30 +0000

DAG: Avoid OOB when legalizing vector indexingIf a vector index is out of bounds, the result is supposed to beundefined but is not undefined behavior. Change the legalizationfor indexing the vector on the stack so that an out of boundsindex does not create an out of bounds memory access.llvm-svn: 291604 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_insert-4.ll

f739d8a2 - [X86][SSE] Regenerated the vec_insert tests.

Fri, 01 Apr 2016 19:42:23 +0000

[X86][SSE] Regenerated the vec_insert tests.llvm-svn: 265179 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_insert-4.ll

583e05d8 - BUILD_VECTOR was missing out on some prime opportunities to use SSE 4.1 inserts.

Wed, 24 Mar 2010 20:49:50 +0000

BUILD_VECTOR was missing out on some prime opportunities to use SSE 4.1 inserts.llvm-svn: 99423 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_insert-4.ll

327cb795 - Add test for pinsrd and pinsrb instructions.

Thu, 23 Jul 2009 01:58:04 +0000

Add test for pinsrd and pinsrb instructions.llvm-svn: 76840 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/X86/vec_insert-4.ll