Changes in fp-logic-replace.ll

25528d6d - [CodeGen] Unify MBB reference format in both MIR and debug output

Mon, 04 Dec 2017 17:18:51 +0000

[CodeGen] Unify MBB reference format in both MIR and debug outputAs part of the unification of the debug format and the MIR format, printMBB references as '%bb.5'.The MIR printer prints the IR name of a MBB only for block definitions.* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g'* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g'* find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g'* grep -nr 'BB#' and fixDifferential Revision: https://reviews.llvm.org/D40422llvm-svn: 319665 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/X86/fp-logic-replace.ll

9d13a188 - [x86] regenerate checks with update_llc_test_checks.py

Mon, 12 Jun 2017 17:05:43 +0000

[x86] regenerate checks with update_llc_test_checks.pyThe dream of a unified check-line auto-generator for all phases of compilation is dead.The llc script has already diverged to be better at its goal, so having 2 scripts thatdo almost the same thing is just causing confusion for newcomers. I plan to fix up morex86 tests in a next commit. We can rip out the llc ability in update_test_checks.py afterthat. llvm-svn: 305202 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/X86/fp-logic-replace.ll

19c4fc5e - This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.

Wed, 28 Dec 2016 10:12:48 +0000

This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.There are cases of AVX-512 instructions that have two possible encodings. This is the case with instructions that use vector registers with low indexes of 0 - 15 and do not use the zmm registers or the mask k registers.The EVEX encoding prefix requires 4 bytes whereas the VEX prefix can take only up to 3 bytes. Consequently, using the VEX encoding for these instructions results in a code size reduction of ~2 bytes even though it is compiled with the AVX-512 features enabled.Reviewers: Craig Topper, Zvi Rackoover, Elena Demikhovsky Differential Revision: https://reviews.llvm.org/D27901llvm-svn: 290663 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/X86/fp-logic-replace.ll

2baef8f4 - [AVX-512] Make sure VLX is also enabled before using EVEX encoded logic ops for scalars. I missed this in r290049.

Sun, 18 Dec 2016 04:17:00 +0000

[AVX-512] Make sure VLX is also enabled before using EVEX encoded logic ops for scalars. I missed this in r290049.llvm-svn: 290055 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/X86/fp-logic-replace.ll

d3295c6a - [AVX-512] Use EVEX encoded logic operations for scalar types when they are available. This gives the register allocator more registers to work with.

Sat, 17 Dec 2016 19:26:00 +0000

[AVX-512] Use EVEX encoded logic operations for scalar types when they are available. This gives the register allocator more registers to work with.llvm-svn: 290049 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/X86/fp-logic-replace.ll

81b021e7 - [AVX-512] Update scalar logic test to show missed opportunity to use EVEX encoded logic instructions to get more registers to use.

Sat, 17 Dec 2016 19:25:55 +0000

[AVX-512] Update scalar logic test to show missed opportunity to use EVEX encoded logic instructions to get more registers to use.llvm-svn: 290048 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/X86/fp-logic-replace.ll

f807f6a0 - [x86] fold fand (fxor X, -1) Y --> fandn X, Y

Mon, 05 Dec 2016 15:45:27 +0000

[x86] fold fand (fxor X, -1) Y --> fandn X, YI noticed this gap in the scalar FP-logic matching with:D26712and:rL287171Differential Revision: https://reviews.llvm.org/D27385llvm-svn: 288675 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/X86/fp-logic-replace.ll

066139a3 - [x86] allow FP-logic ops when one operand is FP and result is FP

Wed, 16 Nov 2016 22:34:05 +0000

[x86] allow FP-logic ops when one operand is FP and result is FPWe save an inter-register file move this way. If there's any CPU wherethe FP logic is slower, we could transform this back to int-logic in MachineCombiner.This helps, but doesn't solve, PR6137:https://llvm.org/bugs/show_bug.cgi?id=6137The 'andn' test shows that we're missing a pattern match torecognize the xor with -1 constant as a 'not' op.llvm-svn: 287171 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/X86/fp-logic-replace.ll

7f3d51f8 - [x86] add fake scalar FP logic instructions to ReplaceableInstrs to save some bytes

Wed, 16 Nov 2016 17:42:40 +0000

[x86] add fake scalar FP logic instructions to ReplaceableInstrs to save some bytesWe can replace "scalar" FP-bitwise-logic with other forms of bitwise-logic instructions. Scalar SSE/AVX FP-logic instructions only exist in your imagination and/or the bowels of compilers, but logically equivalent int, float, and double variants of bitwise-logic instructions are reality in x86, and the float variant may be a shorter instruction depending on which flavor (SSE or AVX) of vector ISA you have...so just prefer float all the time.This is a preliminary step towards solving PR6137:https://llvm.org/bugs/show_bug.cgi?id=6137Differential Revision:https://reviews.llvm.org/D26712llvm-svn: 287122 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/X86/fp-logic-replace.ll

2a51748a - [x86] add tests for FP-logic equivalent instruction replacement

Tue, 15 Nov 2016 21:19:28 +0000

[x86] add tests for FP-logic equivalent instruction replacementThe ANDN test needs at least 3 different fixes.llvm-svn: 287032 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/X86/fp-logic-replace.ll