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<rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/">
<channel>
    <title>Changes in sub-vec.ll</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>25528d6d - [CodeGen] Unify MBB reference format in both MIR and debug output</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/X86/GlobalISel/sub-vec.ll#25528d6d</link>
        <description>[CodeGen] Unify MBB reference format in both MIR and debug outputAs part of the unification of the debug format and the MIR format, printMBB references as &apos;%bb.5&apos;.The MIR printer prints the IR name of a MBB only for block definitions.* find . \( -name &quot;*.mir&quot; -o -name &quot;*.cpp&quot; -o -name &quot;*.h&quot; -o -name &quot;*.ll&quot; \) -type f -print0 | xargs -0 sed -i &apos;&apos; -E &apos;s/BB#&quot; &lt;&lt; ([a-zA-Z0-9_]+)-&gt;getNumber\(\)/&quot; &lt;&lt; printMBBReference(*\1)/g&apos;* find . \( -name &quot;*.mir&quot; -o -name &quot;*.cpp&quot; -o -name &quot;*.h&quot; -o -name &quot;*.ll&quot; \) -type f -print0 | xargs -0 sed -i &apos;&apos; -E &apos;s/BB#&quot; &lt;&lt; ([a-zA-Z0-9_]+)\.getNumber\(\)/&quot; &lt;&lt; printMBBReference(\1)/g&apos;* find . \( -name &quot;*.txt&quot; -o -name &quot;*.s&quot; -o -name &quot;*.mir&quot; -o -name &quot;*.cpp&quot; -o -name &quot;*.h&quot; -o -name &quot;*.ll&quot; \) -type f -print0 | xargs -0 sed -i &apos;&apos; -E &apos;s/BB#([0-9]+)/%bb.\1/g&apos;* grep -nr &apos;BB#&apos; and fixDifferential Revision: https://reviews.llvm.org/D40422llvm-svn: 319665

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/X86/GlobalISel/sub-vec.ll</description>
        <pubDate>Mon, 04 Dec 2017 17:18:51 +0000</pubDate>
        <dc:creator>Francis Visoiu Mistrih &lt;francisvm@yahoo.com&gt;</dc:creator>
    </item>
<item>
        <title>014fc566 - [GlobalISel][X86] Fix G_TRUNC instruction selection.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/X86/GlobalISel/sub-vec.ll#014fc566</link>
        <description>[GlobalISel][X86] Fix G_TRUNC instruction selection.Updated tests with -verify-machineinstrs flag.It fixes 3 tests failed with machine verifier enabled and listedin PR27481llvm-svn: 303502

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/X86/GlobalISel/sub-vec.ll</description>
        <pubDate>Sun, 21 May 2017 11:13:56 +0000</pubDate>
        <dc:creator>Igor Breger &lt;igor.breger@intel.com&gt;</dc:creator>
    </item>
<item>
        <title>842b5b36 - [GlobalISel][X86] G_ADD/G_SUB vector legalizer/selector support.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/X86/GlobalISel/sub-vec.ll#842b5b36</link>
        <description>[GlobalISel][X86] G_ADD/G_SUB vector legalizer/selector support.Summary: G_ADD/G_SUB vector legalizer/selector support.Reviewers: zvi, guyblankReviewed By: guyblankSubscribers: rovka, llvm-commits, kristof.beylsDifferential Revision: https://reviews.llvm.org/D33232llvm-svn: 303345

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/X86/GlobalISel/sub-vec.ll</description>
        <pubDate>Thu, 18 May 2017 11:10:56 +0000</pubDate>
        <dc:creator>Igor Breger &lt;igor.breger@intel.com&gt;</dc:creator>
    </item>
</channel>
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