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    <title>Changes in vec-move-15.ll</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>2693c0a4 - [LegalizeVectorTypes] Allow single loads and stores for more short vectors</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/vec-move-15.ll#2693c0a4</link>
        <description>[LegalizeVectorTypes] Allow single loads and stores for more short vectorsWhen lowering a load or store for TypeWidenVector, the type legalizerwould use a single load or store if the associated integer type was legal.E.g. it would load a v4i8 as an i32 if i32 was legal.This patch extends that behavior to promoted integers as well as legal ones.If the integer type for the full vector width is TypePromoteInteger,the element type is going to be TypePromoteInteger too, and it&apos;s stillbetter to use a single promoting load or truncating store rather than Nindividual promoting loads or truncating stores.  E.g. if you have a v2i8on a target where i16 is promoted to i32, it&apos;s better to load the v2i8 asan i16 rather than load both i8s individually.Original patch by Richard Sandiford.llvm-svn: 236528

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/vec-move-15.ll</description>
        <pubDate>Tue, 05 May 2015 19:32:57 +0000</pubDate>
        <dc:creator>Ulrich Weigand &lt;ulrich.weigand@de.ibm.com&gt;</dc:creator>
    </item>
<item>
        <title>cd2a1b53 - [SystemZ] Handle sub-128 vectors</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/vec-move-15.ll#cd2a1b53</link>
        <description>[SystemZ] Handle sub-128 vectorsThe ABI allows sub-128 vectors to be passed and returned in registers,with the vector occupying the upper part of a register.  We thereforewant to legalize those types by widening the vector rather than promotingthe elements.The patch includes some simple tests for sub-128 vectors and also teststhat we can recognize various pack sequences, some of which use sub-128vectors as temporary results.  One of these forms is based on the packsequences generated by llvmpipe when no intrinsics are used.Signed unpacks are recognized as BUILD_VECTORs whose elements areindividually sign-extended.  Unsigned unpacks can have the equivalentform with zero extension, but they also occur as shuffles in which someelements are zero.Based on a patch by Richard Sandiford.llvm-svn: 236525

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/vec-move-15.ll</description>
        <pubDate>Tue, 05 May 2015 19:29:21 +0000</pubDate>
        <dc:creator>Ulrich Weigand &lt;ulrich.weigand@de.ibm.com&gt;</dc:creator>
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