en Copyright 2015 Java http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/int-cmp-57.ll#6599961c [TwoAddressInstructionPass] Improve the SrcRegMap and DstRegMap computationThis patch contains following enhancements to SrcRegMap and DstRegMap: 1 In findOnlyInterestingUse not only check if the Reg is two address usage, but also check after commutation can it be two address usage. 2 If a physical register is clobbered, remove SrcRegMap entries that are mapped to it. 3 In processTiedPairs, when create a new COPY instruction, add a SrcRegMap entry only when the COPY instruction is coalescable. (The COPY src is killed)With these enhancements isProfitableToCommute can do better commute decision,and finally more register copies are removed.Differential Revision: https://reviews.llvm.org/D108731 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/int-cmp-57.ll Mon, 11 Oct 2021 22:28:31 +0000 Guozhi Wei <carrot@google.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/int-cmp-57.ll#3174683e [SystemZ] Bugfix and improve the handling of CC values.It was recently discovered that the handling of CC values was actually brokensince overflow was not properly handled ('nsw' flag not checked for).Add and sub instructions now have a new target specific instruction flagnamed SystemZII::CCIfNoSignedWrap. It means that the CC result can be usedinstead of a compare with 0, but only if the instruction has the 'nsw' flagset.This patch also adds the improvements of conversion to logical instructionsand the analyzing of add with immediates, to be able to eliminate morecompares.Review: Ulrich Weigandhttps://reviews.llvm.org/D66868 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/int-cmp-57.ll Tue, 17 Dec 2019 18:14:34 +0000 Jonas Paulsson <paulsson@linux.vnet.ibm.com>