<?xml version="1.0"?>
<?xml-stylesheet type="text/xsl" href="/rss.xsl.xml"?>
<rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/">
<channel>
    <title>Changes in vmulh-sdnode.ll</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>e9ceeedf - [RISCV][3/3] Switch undef -&gt; poison in scalable-vector RVV tests</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll#e9ceeedf</link>
        <description>[RISCV][3/3] Switch undef -&gt; poison in scalable-vector RVV tests

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll</description>
        <pubDate>Tue, 01 Feb 2022 10:54:39 +0000</pubDate>
        <dc:creator>Fraser Cormack &lt;fraser@codeplay.com&gt;</dc:creator>
    </item>
<item>
        <title>3cf15af2 - [RISCV] Remove experimental prefix from rvv-related extensions.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll#3cf15af2</link>
        <description>[RISCV] Remove experimental prefix from rvv-related extensions.Extensions affected: +v, +zve*, +zvl*Reviewed By: craig.topperDifferential Revision: https://reviews.llvm.org/D117860

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll</description>
        <pubDate>Fri, 21 Jan 2022 08:39:23 +0000</pubDate>
        <dc:creator>eopXD &lt;eop.chen@sifive.com&gt;</dc:creator>
    </item>
<item>
        <title>af0ecfcc - [RISCV] Generate pseudo instruction li</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll#af0ecfcc</link>
        <description>[RISCV] Generate pseudo instruction liAdd an alias of `addi [x], zero, imm` to generate pseudoinstruction li, which makes assembly mush more readable.For existed tests, users can update them by running script`llvm/utils/update_llc_test_checks.py`.Reviewed By: asbDifferential Revision: https://reviews.llvm.org/D112692

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll</description>
        <pubDate>Mon, 22 Nov 2021 06:01:37 +0000</pubDate>
        <dc:creator>wangpc &lt;pc.wang@linux.alibaba.com&gt;</dc:creator>
    </item>
<item>
        <title>a39eadcf - [DAGCombiner] Teach combineShiftToMULH to handle constant and const splat vector.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll#a39eadcf</link>
        <description>[DAGCombiner] Teach combineShiftToMULH to handle constant and const splat vector.Fold (srl (mul (zext i32:$a to i64), i64:c), 32) -&gt; (mulhu $a, $b),if c can truncate to i32 without loss.Reviewed By: frasercrmck, craig.topper, RKSimonDifferential Revision: https://reviews.llvm.org/D108129

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll</description>
        <pubDate>Tue, 02 Nov 2021 11:13:04 +0000</pubDate>
        <dc:creator>jacquesguan &lt;jacquesguan@me.com&gt;</dc:creator>
    </item>
<item>
        <title>a9a89520 - [RISCV][test] Precommit tests for D108129.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll#a9a89520</link>
        <description>[RISCV][test] Precommit tests for D108129.Reviewed By: frasercrmck, RKSimonDifferential Revision: https://reviews.llvm.org/D110675

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll</description>
        <pubDate>Tue, 02 Nov 2021 02:29:47 +0000</pubDate>
        <dc:creator>jacquesguan &lt;jacquesguan@me.com&gt;</dc:creator>
    </item>
<item>
        <title>a7d34c80 - [RISCV] Rename vmulh-sdnode-rv32.ll and add rv64 command line. NFC</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll#a7d34c80</link>
        <description>[RISCV] Rename vmulh-sdnode-rv32.ll and add rv64 command line. NFC

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll</description>
        <pubDate>Mon, 25 Oct 2021 01:41:32 +0000</pubDate>
        <dc:creator>Craig Topper &lt;craig.topper@sifive.com&gt;</dc:creator>
    </item>
</channel>
</rss>
