en Copyright 2015 Java http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_rotate_shift.ll#da4a966e NFC - Various typo fixes in testsllvm-svn: 336268 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_rotate_shift.ll Wed, 04 Jul 2018 13:28:39 +0000 Gabor Buella <gabor.buella@intel.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_rotate_shift.ll#a538b0f0 Adding -verify-machineinstrs option to PowerPC testsCurrently we have a number of tests that fail with -verify-machineinstrs.To detect this cases earlier we add the option to the testcases with theexception of tests that will currently fail with this option. PR 27456 keepstrack of this failures.No code review, as discussed with Hal Finkel.llvm-svn: 277624 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_rotate_shift.ll Wed, 03 Aug 2016 18:17:35 +0000 Ehsan Amiri <amehsan@ca.ibm.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_rotate_shift.ll#e48b1e1c While reviewing the changes to Clang to add builtin support for the vsld, vsrd, and vsrad instructions, it was pointed out that the builtins are generating the LLVM opcodes (shl, lshr, and ashr) not calls to the intrinsics. This patch changes the implementation of the vsld, vsrd, and vsrad instructions from from intrinsics to VXForm_1 instructions and makes them legal with P8 Altivec. It also removes the definition of the int_ppc_altivec_vsld, int_ppc_altivec_vsrd, and int_ppc_altivec_vsrad intrinsics.llvm-svn: 231378 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_rotate_shift.ll Thu, 05 Mar 2015 16:24:38 +0000 Kit Barton <kbarton@ca.ibm.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_rotate_shift.ll#0cfa7b7a Add the following 64-bit vector integer arithmetic instructions added in POWER8:vaddudmvsubudmvmuleswvmuloswvmuleuwvmulouwvmuluwmvmaxsdvmaxudvminsdvminudvcmpequdvcmpequd.vcmpgtsdvcmpgtsd.vcmpgtudvcmpgtud.vrldvsldvsrdvsradPhabricator review: http://reviews.llvm.org/D7959llvm-svn: 231115 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_rotate_shift.ll Tue, 03 Mar 2015 19:55:45 +0000 Kit Barton <kbarton@ca.ibm.com>