en Copyright 2015 Java http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll#e2d2ce9f PowerPC: Do not use llc -march in tests.`llc -march` is problematic because it only switches the targetarchitecture, but leaves the operating system unchanged. Thisoccasionally leads to indeterministic tests because the OS fromLLVM_DEFAULT_TARGET_TRIPLE is used.However we can simply always use `llc -mtriple` instead. This changesall the tests to do this to avoid people using -march when they copy andpaste parts of tests.This patch:- Removes -march if the .ll file already has a matching `target triple` directive or -mtriple argument.- In all other cases changes -march=ppc32/-march=ppc64 to -mtriple=ppc32--/-mtriple=ppc64--See also the discussion in https://reviews.llvm.org/D35287llvm-svn: 309754 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll Tue, 01 Aug 2017 22:20:41 +0000 Matthias Braun <matze@braunis.de> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll#a538b0f0 Adding -verify-machineinstrs option to PowerPC testsCurrently we have a number of tests that fail with -verify-machineinstrs.To detect this cases earlier we add the option to the testcases with theexception of tests that will currently fail with this option. PR 27456 keepstrack of this failures.No code review, as discussed with Hal Finkel.llvm-svn: 277624 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll Wed, 03 Aug 2016 18:17:35 +0000 Ehsan Amiri <amehsan@ca.ibm.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll#20d3981e Change the generation of the vmuluwm instruction to be based on the MUL opcode.Phabricator review: http://reviews.llvm.org/D8185llvm-svn: 231827 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll Tue, 10 Mar 2015 19:49:38 +0000 Kit Barton <kbarton@ca.ibm.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll#a79ac14f [opaque pointer type] Add textual IR support for explicit type parameter to load instructionEssentially the same as the GEP change in r230786.A similar migration script can be used to update test cases, though a few moretest case improvements/changes were required this time around: (r229269-r229278)import fileinputimport sysimport repat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))Reviewers: rafael, dexonsmith, grosserDifferential Revision: http://reviews.llvm.org/D7649llvm-svn: 230794 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll Fri, 27 Feb 2015 21:17:42 +0000 David Blaikie <dblaikie@gmail.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll#941a3244 [PowerPC] Clean up -mattr=+vsx tests to always specify -mcpuWe recently discovered an issue that reinforces what a good idea it isto always specify -mcpu in our code generation tests, particularly for-mattr=+vsx. This patch ensures that all tests that specify-mattr=+vsx also specify -mcpu=pwr7 or -mcpu=pwr8, as appropriate.Some of the uses of -mattr=+vsx added recently don't make much sense(when specified for -mtriple=powerpc-apple-darwin8 or -march=ppc32,for example). For cases like this I've just removed the extra VSXtest commands; there's enough coverage without them.llvm-svn: 220173 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll Sun, 19 Oct 2014 21:29:21 +0000 Bill Schmidt <wschmidt@linux.vnet.ibm.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll#32e9c646 [PPC] Adjust some PowerPC tests to account for presence/absence of VSXPatch by Bill Seurer; committed on his behalf.These test cases generate slightly different code sequences when VSXis activated and thus fail. The update turns off VSX explicitly forthe existing checks and then adds a second set of checks for most ofthem that test the VSX instruction output.llvm-svn: 220019 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll Fri, 17 Oct 2014 01:41:22 +0000 Bill Schmidt <wschmidt@linux.vnet.ibm.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll#42995e8c [PPC64LE] Generate correct little-endian code for v16i8 multiplyThe existing code in PPCTargetLowering::LowerMUL() for multiplying twov16i8 values assumes that vector elements are numbered in big-endianorder. For little-endian targets, the vector element numbering isreversed, but the vmuleub, vmuloub, and vperm instructions stillassume big-endian numbering. To account for this, we must adjust thepermute control vector and reverse the order of the input registers onthe vperm instruction.The existing test/CodeGen/PowerPC/vec_mul.ll is updated to be executedon powerpc64 and powerpc64le targets as well as the original powerpc(32-bit) target.llvm-svn: 210474 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll Mon, 09 Jun 2014 16:06:29 +0000 Bill Schmidt <wschmidt@linux.vnet.ibm.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll#f799e3f9 Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.This was done with the following sed invocation to catch label lines demarking function boundaries: sed -i '' "s/^;\( *\)\([A-Z0-9_]*\):\( *\)test\([A-Za-z0-9_-]*\):\( *\)$/;\1\2-LABEL:\3test\4:\5/g" test/CodeGen/*/*.llwhich was written conservatively to avoid false positives rather than false negatives. I scanned through all the changes and everything looks correct.llvm-svn: 186258 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll Sat, 13 Jul 2013 20:38:47 +0000 Stephen Lin <stephenwlin@gmail.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll#31e7d2de test/CodeGen/PowerPC/vec_mul.ll: Add a triple. Thanks, Hal.llvm-svn: 169026 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll Fri, 30 Nov 2012 19:15:10 +0000 Chad Rosier <mcrosier@apple.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll#a820e7fe test/CodeGen/PowerPC/vec_mul.ll: Fix register operands.llvm-svn: 169020 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll Fri, 30 Nov 2012 18:29:01 +0000 Chad Rosier <mcrosier@apple.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll#faaf1310 test/CodeGen/PowerPC: Add explicit -march=ppc32.FIXME: Please add another RUN line if you would like to check also on ppc64.llvm-svn: 168999 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll Fri, 30 Nov 2012 13:28:31 +0000 NAKAMURA Takumi <geek4civic@gmail.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll#812410f2 This patch fixes the Altivec addend construction for the fused multiply-addinstruction (vmaddfp) to conform with IEEE to ensure the sign of a zeroresult when resulting product is -0.0.The -0.0 vector addend to vmaddfp is generated by a creating a vectorwith full bits sets and then shifting each elements by 31-bits to theleft, resulting in a vector of 0x80000000 (or -0.0 as float).The 'buildvec_canonicalize.ll' was adjusted to reflect this change andthe 'vec_mul.ll' was complemented with the float vector multiplicationtest.llvm-svn: 168998 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll Fri, 30 Nov 2012 13:05:44 +0000 Adhemerval Zanella <azanella@linux.vnet.ibm.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll#c8054d90 Eliminate more uses of llvm-as and llvm-dis.llvm-svn: 81293 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll Wed, 09 Sep 2009 00:09:15 +0000 Dan Gohman <gohman@apple.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll#a99d8b5a Remove llvm-upgrade and update tests.llvm-svn: 47325 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll Tue, 19 Feb 2008 08:07:33 +0000 Tanya Lattner <tonic@nondot.org> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll#6e87ec43 For PR1319:Remove && from the end of the lines to prevent tests from throwing runlines into the background. Also, clean up places where the same commandis run multiple times by using a temporary file.llvm-svn: 36142 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll Mon, 16 Apr 2007 17:36:08 +0000 Reid Spencer <rspencer@reidspencer.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll#83b3d826 Regression is gone, don't try to find it on clean target.llvm-svn: 33296 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/vec_mul.ll Wed, 17 Jan 2007 07:59:14 +0000 Reid Spencer <rspencer@reidspencer.com>