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    <title>Changes in varargs.ll</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>7fdb3a29 - [PowerPC] Implement the areMemAccessesTriviallyDisjoint hook</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/varargs.ll#7fdb3a29</link>
        <description>[PowerPC] Implement the areMemAccessesTriviallyDisjoint hookAfter implemented this hook, we will model the memory dependency in the scheduling dependency graph more precise,and will have more opportunity to reorder the load/stores, as they didn&apos;t have the dependency at some conditionDifferential Revision: https://reviews.llvm.org/D63804llvm-svn: 364886

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/varargs.ll</description>
        <pubDate>Tue, 02 Jul 2019 03:28:52 +0000</pubDate>
        <dc:creator>QingShan Zhang &lt;qshanz@cn.ibm.com&gt;</dc:creator>
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<item>
        <title>318b6daf - [PowerPC][UpdateTestChecks] powerpc- triple support</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/varargs.ll#318b6daf</link>
        <description>[PowerPC][UpdateTestChecks] powerpc- triple supportThere are quite some old testcases with powerpc- triple,we should add this triple support so that we can update them with script.Differential Revision: https://reviews.llvm.org/D63723llvm-svn: 364213

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/varargs.ll</description>
        <pubDate>Mon, 24 Jun 2019 18:00:34 +0000</pubDate>
        <dc:creator>Jinsong Ji &lt;jji@us.ibm.com&gt;</dc:creator>
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        <title>7c80f98b - [PPC] Remove Darwin support from POWER backend.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/varargs.ll#7c80f98b</link>
        <description>[PPC] Remove Darwin support from POWER backend.This patch issues an error message if Darwin ABI is attempted with the PPCbackend. It also cleans up existing test cases, either converting the test touse an alternative triple or removing the test if the coverage is no longerneeded.Updated Tests-------------The majority of test cases were updated to use a different triple that does notinclude the Darwin ABI. Many tests were also updated to use FileCheck, in placeof grep.Deleted Tests-------------llvm/test/tools/dsymutil/PowerPC/sibling.test was originally added to testspecific functionality of dsymutil using an object file created with an oldversion of llvm-gcc for a Powerbook G4. After a discussion with @JDevlieghere hesuggested removing the test.llvm/test/CodeGen/PowerPC/combine_loads_from_build_pair.ll was converted from aPPC test to a SystemZ test, as the behavior is also reproducible there.All other tests that were deleted were specific to the darwin/ppc ABI and nolonger necessary.Phabricator Review: https://reviews.llvm.org/D50988llvm-svn: 340795

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/varargs.ll</description>
        <pubDate>Tue, 28 Aug 2018 01:18:29 +0000</pubDate>
        <dc:creator>Kit Barton &lt;kbarton@ca.ibm.com&gt;</dc:creator>
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<item>
        <title>a538b0f0 - Adding -verify-machineinstrs option to PowerPC tests</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/varargs.ll#a538b0f0</link>
        <description>Adding -verify-machineinstrs option to PowerPC testsCurrently we have a number of tests that fail with -verify-machineinstrs.To detect this cases earlier we add the option to the testcases with theexception of tests that will currently fail with this option. PR 27456 keepstrack of this failures.No code review, as discussed with Hal Finkel.llvm-svn: 277624

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/varargs.ll</description>
        <pubDate>Wed, 03 Aug 2016 18:17:35 +0000</pubDate>
        <dc:creator>Ehsan Amiri &lt;amehsan@ca.ibm.com&gt;</dc:creator>
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<item>
        <title>f799e3f9 - Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/varargs.ll#f799e3f9</link>
        <description>Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.This was done with the following sed invocation to catch label lines demarking function boundaries:    sed -i &apos;&apos; &quot;s/^;\( *\)\([A-Z0-9_]*\):\( *\)test\([A-Za-z0-9_-]*\):\( *\)$/;\1\2-LABEL:\3test\4:\5/g&quot; test/CodeGen/*/*.llwhich was written conservatively to avoid false positives rather than false negatives. I scanned through all the changes and everything looks correct.llvm-svn: 186258

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/varargs.ll</description>
        <pubDate>Sat, 13 Jul 2013 20:38:47 +0000</pubDate>
        <dc:creator>Stephen Lin &lt;stephenwlin@gmail.com&gt;</dc:creator>
    </item>
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        <title>01271c60 - Don&apos;t reserve R2 on Darwin/PPC</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/varargs.ll#01271c60</link>
        <description>Don&apos;t reserve R2 on Darwin/PPCNow that only the register-scavenger version of the CR spilling code remains,we no longer need the Darwin R2 hack. Darwin can use R0 as a spare register inany case where the System V ABI uses it (R0 is special architecturally, and sois reserved under all common ABIs).A few test cases needed to be updated to reflect the register-allocation changes.llvm-svn: 176868

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/varargs.ll</description>
        <pubDate>Tue, 12 Mar 2013 15:18:14 +0000</pubDate>
        <dc:creator>Hal Finkel &lt;hfinkel@anl.gov&gt;</dc:creator>
    </item>
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        <title>f8f7537a - force a triple, varargs isn&apos;t supported with the SVR4 ABI the buildbot tells me.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/varargs.ll#f8f7537a</link>
        <description>force a triple, varargs isn&apos;t supported with the SVR4 ABI the buildbot tells me.llvm-svn: 116170

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/varargs.ll</description>
        <pubDate>Sun, 10 Oct 2010 18:59:01 +0000</pubDate>
        <dc:creator>Chris Lattner &lt;sabre@nondot.org&gt;</dc:creator>
    </item>
<item>
        <title>d10babfd - fix the expansion of va_arg instruction on PPC to know the arg </title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/varargs.ll#d10babfd</link>
        <description>fix the expansion of va_arg instruction on PPC to know the arg alignment for PPC32/64, avoiding some masking operations.llvm-gcc expands vaarg inline instead of using the instructionso it has never hit this.llvm-svn: 116168

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/varargs.ll</description>
        <pubDate>Sun, 10 Oct 2010 18:34:00 +0000</pubDate>
        <dc:creator>Chris Lattner &lt;sabre@nondot.org&gt;</dc:creator>
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</channel>
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