Changes in testComparesileuc.ll

7200d2cf - [NFC] Disallow unused prefixes in CodeGen/PowerPC tests.

Mon, 11 Jan 2021 04:15:05 +0000

[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.Also removed where applicable.Differential Revision: https://reviews.llvm.org/D94385 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/testComparesileuc.ll

88cadb89 - [PowerPC][test] Add explicit dso_local to definitions in ELF static relocation model tests

Wed, 30 Dec 2020 18:32:34 +0000

[PowerPC][test] Add explicit dso_local to definitions in ELF static relocation model testsTargetMachine::shouldAssumeDSOLocal currently implies dso_local for such definitions.Adding explicit dso_local makes these tests align with the clang -fpic behaviorand allow the removal of the TargetMachine::shouldAssumeDSOLocal special case.Rewrite preemption.ll to dsolocal-static.ll and dsolocal-pic.ll, and add"PIC Level" metadata. List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/testComparesileuc.ll

216be996 - [NFC][PowerPC] Consolidate testing of common linkage symbols

Fri, 20 Sep 2019 20:31:37 +0000

[NFC][PowerPC] Consolidate testing of common linkage symbolsAdd a new file to test the code gen for common linkage symbol.Remove common linkage in some other testcases to avoid distraction.llvm-svn: 372426 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/testComparesileuc.ll

cac5274b - [PowerPC] Automatically generate various tests. NFC

Thu, 22 Aug 2019 20:26:56 +0000

[PowerPC] Automatically generate various tests. NFCllvm-svn: 369700 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/testComparesileuc.ll

3e800192 - [DAGCombiner] form 'not' ops ahead of shifts (PR39657)

Thu, 22 Nov 2018 19:24:10 +0000

[DAGCombiner] form 'not' ops ahead of shifts (PR39657)We fail to canonicalize IR this way (prefer 'not' ops to arbitrary 'xor'),but that would not matter without this patch because DAGCombiner was reversing that transform. I think we need this transform in the backend regardless of what happens in IR to catch cases where the shift-xor is formed late from GEP or other ops.https://rise4fun.com/Alive/NC1 Name: shl Pre: (-1 << C2) == C1 %shl = shl i8 %x, C2 %r = xor i8 %shl, C1 => %not = xor i8 %x, -1 %r = shl i8 %not, C2 Name: shr Pre: (-1 u>> C2) == C1 %sh = lshr i8 %x, C2 %r = xor i8 %sh, C1 => %not = xor i8 %x, -1 %r = lshr i8 %not, C2https://bugs.llvm.org/show_bug.cgi?id=39657llvm-svn: 347478 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/testComparesileuc.ll

db7e7704 - [PowerPC] Recommit r314244 with refactoring and off by default

Thu, 30 Nov 2017 13:39:10 +0000

[PowerPC] Recommit r314244 with refactoring and off by defaultThis re-commits everything that was pulled in r314244. The transformationis off by default (patch to enable it to follow). The code is refactoredto have a single entry-point and provide fine-grained control over patternsthat it selects. This patch also fixes the bugs in the original code.Everything that failed with the original patch has been re-tested with thispatch (with the transformation turned on). So the patch to turn this on issoon to follow.Differential Revision: https://reviews.llvm.org/D38575llvm-svn: 319434 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/testComparesileuc.ll

e22ebeab - [PowerPC] Reverting sequence of patches for elimination of comparison instructions

Tue, 26 Sep 2017 20:42:47 +0000

[PowerPC] Reverting sequence of patches for elimination of comparison instructionsIn the past while, I've committed a number of patches in the PowerPC back endaimed at eliminating comparison instructions. However, this causes some failuresin proprietary source and these issues are not observed in SPEC or any opensource packages I've been able to run.As a result, I'm pulling the entire series and will refactor it to:- Have a single entry point for easy control- Have fine-grained control over which patterns we transformA side-effect of this is that test cases for these patches (and modified bythem) are XFAIL-ed. This is a temporary measure as it is counter-productiveto remove/modify these test cases and then have to modify them again whenthe refactored patch is recommitted.The failure will be investigated in parallel to the refactoring effort andthe recommit will either have a fix for it or will leave this transformationoff by default until the problem is resolved.llvm-svn: 314244 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/testComparesileuc.ll

c4980799 - [PowerPC] Eliminate compares - add i32 sext/zext handling for SETULE/SETUGE

Sat, 23 Sep 2017 09:50:12 +0000

[PowerPC] Eliminate compares - add i32 sext/zext handling for SETULE/SETUGEAs mentioned in https://reviews.llvm.org/D33718, this simply adds anotherpattern to the compare elimination sequence and is committed without adifferential revision.llvm-svn: 314060 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/testComparesileuc.ll