en Copyright 2015 Java http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/constant-pool.ll#67c64d83 [PowerPC] Implement scheduling model for Power10Reviewed By: jsjiDifferential Revision: https://reviews.llvm.org/D110855 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/constant-pool.ll Mon, 18 Oct 2021 07:27:49 +0000 Qiu Chaofan <qiucofan@cn.ibm.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/constant-pool.ll#6e1aaf18 [PowerPC] Mark splat immediate instructions as rematerializableThis patch marks splat immediate instructions XXSPLTIW and XXSPLTIDP asrematerializable to prevent MachineLICM from moving them out of loops.Reviewed By: lei, amyDifferential revision: https://reviews.llvm.org/D108823 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/constant-pool.ll Fri, 24 Sep 2021 15:46:56 +0000 Victor Huang <wei.huang@ibm.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/constant-pool.ll#9654cfd5 [PowerPC] Fix materialization of SP float values on Power10All floating point values in registers are in double precisionrepresentation. In order to materialize the correct single precisionvalue, we need to convert the APFloat that represents the valueto double precision first.Reviewed By: amyk, NeHuangDifferential Revision: https://reviews.llvm.org/D106812 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/constant-pool.ll Mon, 26 Jul 2021 17:19:07 +0000 Nemanja Ivanovic <nemanja.i.ibm@gmail.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/constant-pool.ll#ba627a32 [PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and TestsThis patch includes the following updates to the load/store refactoring effort introduced in D93370: - Update various VSX patterns that use to "force" an XForm, to instead just XForm. This allows the ability for the patterns to compute the most optimal addressing mode (and to produce a DForm instruction when possible)- Update pattern and test case for the LXVD2X/STXVD2X intrinsics- Update LIT test cases that use to use the XForm instruction to use the DForm instructionDifferential Revision: https://reviews.llvm.org/D95115 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/constant-pool.ll Wed, 14 Jul 2021 01:33:23 +0000 Amy Kwan <amy.kwan1@ibm.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/constant-pool.ll#bc104fdc [PowerPC] Relax register superclasses for paired memopsRelaxing superclass constraint for VSX register classes helps reducing32-byte spills and copies when register pressure is high.In test case affected, some of them introduces more copies due to newallocation order. However, this patch should not be the root cause, andwe may be able to fix it in other places of register allocation.Reviewed By: nemanjaiDifferential Revision: https://reviews.llvm.org/D104006 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/constant-pool.ll Fri, 11 Jun 2021 06:51:36 +0000 Qiu Chaofan <qiucofan@cn.ibm.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/constant-pool.ll#e29bb074 [PowerPC] Exploit xxsplti32dx (constant materialization) for scalarsThis patch exploits the xxsplti32dx instruction available on Power10in place of constant pool loads where xxspltidp would not be able to,usually because the immediate cannot fit into 32 bits.Differential Revision: https://reviews.llvm.org/D95458 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/constant-pool.ll Wed, 24 Mar 2021 19:57:27 +0000 Albion Fung <albion.fung@ibm.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/constant-pool.ll#2d9097a0 [NFC][Test] Add tests for constant pool on PowerPC List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/constant-pool.ll Mon, 09 Nov 2020 09:17:28 +0000 QingShan Zhang <qshanz@cn.ibm.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/constant-pool.ll#0d3a5d09 [NFC][PowerPC] Updated a number of Power PC tests used for PC RelativeUpdated the tests to use -mcpu=pwr10 instead of -mcpu=future.Updated the tests to include Big Endian testing. List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/constant-pool.ll Tue, 21 Jul 2020 17:27:18 +0000 Stefan Pintilie <stefanp@ca.ibm.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/constant-pool.ll#90b1a710 [PowerPC] Enable default support of quad precision operationsSummary: Remove option guarding support of quad precision operations.Reviewers: nemanjai, #powerpc, steven.zhangReviewed By: nemanjai, #powerpc, steven.zhangSubscribers: qiucf, wuzish, nemanjai, hiraditya, kbarton, shchenz, llvm-commitsTags: #llvmDifferential Revision: https://reviews.llvm.org/D83437 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/constant-pool.ll Wed, 08 Jul 2020 22:07:34 +0000 Lei Huang <lei@ca.ibm.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/constant-pool.ll#75828ef6 [PowerPC][Future] Initial support for PCRel addressing for constant pool loadsAdd initial support for PC Relative addressing for constant pool loads.This includes adding a new relocation for @pcrel and adding a new PowerPC flagto identify PC relative addressing.Differential Revision: https://reviews.llvm.org/D74486 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/constant-pool.ll Thu, 09 Apr 2020 16:17:23 +0000 Stefan Pintilie <stefanp@ca.ibm.com>