en Copyright 2015 Java http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/ARM/ipra.ll#8ed8353f Reland: Fix and test inter-procedural register allocation for ARMAdd an explicit construction of the ArrayRef, gcc 5 and earlier don'tseem to select the ArrayRef constructor which takes a C array when theconstruction is implicit.Original commit message:- Avoid a crash when IPRA calls ARMFrameLowering::determineCalleeSaves with a null RegScavenger. Simply not updating the register scavenger is fine because IPRA only cares about the SavedRegs vector, the acutal code of the function has already been generated at this point.- Add a new hook to TargetRegisterInfo to get the set of registers which can be clobbered inside a call, even if the compiler can see both sides, by linker-generated code.Differential revision: https://reviews.llvm.org/D64908llvm-svn: 367819 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/ARM/ipra.ll Mon, 05 Aug 2019 09:04:10 +0000 Oliver Stannard <oliver.stannard@linaro.org> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/ARM/ipra.ll#f6b00c27 Fix and test inter-procedural register allocation for ARM- Avoid a crash when IPRA calls ARMFrameLowering::determineCalleeSaves with a null RegScavenger. Simply not updating the register scavenger is fine because IPRA only cares about the SavedRegs vector, the acutal code of the function has already been generated at this point.- Add a new hook to TargetRegisterInfo to get the set of registers which can be clobbered inside a call, even if the compiler can see both sides, by linker-generated code.Differential revision: https://reviews.llvm.org/D64908llvm-svn: 367669 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/ARM/ipra.ll Fri, 02 Aug 2019 10:23:05 +0000 Oliver Stannard <oliver.stannard@linaro.org>