en Copyright 2015 Java http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/srem.ll#52bc2e75 [AMDGPU][SelectionDAG] Don't combine uniform multiplies to MUL_[UI]24Prefer to keep uniform (non-divergent) multiplies on the scalar ALU whenpossible. This significantly improves some game cases by eliminatingv_readfirstlane instructions when the result feeds into a scalaroperation, like the address calculation for a scalar load or store.Since isDivergent is only an approximation of whether a value is inSGPRs, it can potentially regress some situations where a uniform valueends up in a VGPR. These should be rare in real code, although the testchanges do contain a number of examples.Most of the test changes are just using s_mul instead of v_mul/mad whichis generally better for both register pressure and latency (at least onGFX10 where sgpr pressure doesn't affect occupancy and vector ALUinstructions have significantly longer latency than scalar ALU). SomeR600 tests now use MULLO_INT instead of MUL_UINT24.GlobalISel appears to handle more scenarios in the desirable way,although it can also be thrown off and fails to select the 24-bitmultiplies in some cases.Alternative solution considered and rejected was to allow selectingMUL_[UI]24 to S_MUL_I32. I've rejected this because the definition ofthose SD operations works is don't-care on the most significant 8 bits,and this fact is used in some combines via SimplifyDemandedBits.Based on a patch by Nicolai Hähnle.Differential Revision: https://reviews.llvm.org/D97063 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/srem.ll Mon, 03 Aug 2020 13:03:18 +0000 Nicolai Hähnle <nicolai.haehnle@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/srem.ll#7ae0033c [AMDGPU] Fix expansion of i16 MULHThis commit marks i16 MULH as expand in AMDGPU backend,which is necessary after the refactoring in D80485.Differential Revision: https://reviews.llvm.org/D89965 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/srem.ll Thu, 22 Oct 2020 14:28:33 +0000 Piotr Sobczak <Piotr.Sobczak@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/srem.ll#971cb8b6 [AMDGPU] gfx1010: prefer V_MUL_LO_U32 over V_MUL_LO_I32GFX10 deprecates v_mul_lo_i32 instruction, so choose u32 form forall targets.Differential Revision: https://reviews.llvm.org/D61525llvm-svn: 360094 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/srem.ll Mon, 06 May 2019 22:27:05 +0000 Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/srem.ll#db7ee766 [AMDGPU] Preliminary patch for divergence driven instruction selection. Immediate selection predicate changedDifferential revision: https://reviews.llvm.org/D51734Reviewers: rampitecllvm-svn: 341928 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/srem.ll Tue, 11 Sep 2018 11:56:50 +0000 Alexander Timofeev <Alexander.Timofeev@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/srem.ll#a0342dc9 [AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}See bug 34765: https://bugs.llvm.org//show_bug.cgi?id=34765Reviewers: tamazov, SamWot, arsenm, vpykhtinDifferential Revision: https://reviews.llvm.org/D40088llvm-svn: 318675 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/srem.ll Mon, 20 Nov 2017 18:24:21 +0000 Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/srem.ll#36b4b0be AMDGPU: Remove -mcpu=SILeftover from before amdgcn/r600 split.llvm-svn: 310277 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/srem.ll Mon, 07 Aug 2017 18:30:35 +0000 Matt Arsenault <Matthew.Arsenault@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/srem.ll#982aee6a [AMDGPU] Switch scalarize global loads ON by defaultDifferential revision: https://reviews.llvm.org/D34407llvm-svn: 307097 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/srem.ll Tue, 04 Jul 2017 17:32:00 +0000 Alexander Timofeev <Alexander.Timofeev@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/srem.ll#e4a74137 Revert r307026, "[AMDGPU] Switch scalarize global loads ON by default"It broke a testcase. Failing Tests (1): LLVM :: CodeGen/AMDGPU/alignbit-pat.llllvm-svn: 307054 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/srem.ll Tue, 04 Jul 2017 02:14:18 +0000 NAKAMURA Takumi <geek4civic@gmail.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/srem.ll#ea7f08be [AMDGPU] Switch scalarize global loads ON by defaultDifferential revision: https://reviews.llvm.org/D34407llvm-svn: 307026 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/srem.ll Mon, 03 Jul 2017 14:54:11 +0000 Alexander Timofeev <Alexander.Timofeev@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/srem.ll#56ea488d [AMDGPU] Allow SDWA in instructions with immediates and SGPRsAn encoding does not allow to use SDWA in an instruction withscalar operands, either literals or SGPRs. That is however possibleto copy these operands into a VGPR first.Several copies of the value are produced if multiple SDWA conversionswere done. To cleanup MachineLICM (to hoist copies out of loops),MachineCSE (to remove duplicate copies) and SIFoldOperands (to replaceSGPR to VGPR copy with immediate copy right to the VGPR) runs are addedafter the SDWA pass.Differential Revision: https://reviews.llvm.org/D33583llvm-svn: 304219 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/srem.ll Tue, 30 May 2017 16:49:24 +0000 Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/srem.ll#3dbeefa9 AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernelCurrently the default C calling convention functions are treatedthe same as compute kernels. Make this explicit so the defaultcalling convention can be changed to a non-kernel.Converted with perl -pi -e 's/define void/define amdgpu_kernel void/'on the relevant test directories (and undoing in one place that actuallywanted a non-kernel).llvm-svn: 298444 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/srem.ll Tue, 21 Mar 2017 21:39:51 +0000 Matt Arsenault <Matthew.Arsenault@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/srem.ll#45bb48ea R600 -> AMDGPU renamellvm-svn: 239657 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/srem.ll Sat, 13 Jun 2015 03:28:10 +0000 Tom Stellard <thomas.stellard@amd.com>