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    <title>Changes in lower-term-opcodes.mir</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>8871c3c5 - [AMDGPU] Regenerate MIR checks. NFC.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/lower-term-opcodes.mir#8871c3c5</link>
        <description>[AMDGPU] Regenerate MIR checks. NFC.

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/lower-term-opcodes.mir</description>
        <pubDate>Mon, 27 Jun 2022 11:15:25 +0000</pubDate>
        <dc:creator>Jay Foad &lt;jay.foad@amd.com&gt;</dc:creator>
    </item>
<item>
        <title>18ed279a - [AMDGPU] gfx11 subtarget features &amp; early tests</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/lower-term-opcodes.mir#18ed279a</link>
        <description>[AMDGPU] gfx11 subtarget features &amp; early testsTablegen definitions for subtarget features and cpp predicate functions toaccess the features.New Sub-TargetProcessors and common latencies.Simple changes to MIR codegen tests which pass on gfx11 because they have thesame output as previous subtargets or operate on pseudo instructions whichare reused from previous subtargets.Contributors:Jay Foad &lt;jay.foad@amd.com&gt;Petar Avramovic &lt;Petar.Avramovic@amd.com&gt;Patch 4/N for upstreaming of AMDGPU gfx11 architectureDepends on D124538Reviewed By: Petar.Avramovic, foadDifferential Revision: https://reviews.llvm.org/D125261

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/lower-term-opcodes.mir</description>
        <pubDate>Thu, 14 Apr 2022 13:32:59 +0000</pubDate>
        <dc:creator>Joe Nash &lt;Joseph.Nash@amd.com&gt;</dc:creator>
    </item>
<item>
        <title>fde83517 - [AMDGPU] Fix lowering of S_MOV_{B32,B64}_term</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/lower-term-opcodes.mir#fde83517</link>
        <description>[AMDGPU] Fix lowering of S_MOV_{B32,B64}_termIf the source of S_MOV_{B32,B64}_term is an immediate then itcannot be lowered to a COPY.Reviewed By: arsenmDifferential Revision: https://reviews.llvm.org/D90451

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/lower-term-opcodes.mir</description>
        <pubDate>Tue, 10 Nov 2020 03:16:26 +0000</pubDate>
        <dc:creator>Carl Ritson &lt;carl.ritson@amd.com&gt;</dc:creator>
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