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    <title>Changes in llvm.memcpy.ll</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>2252cac6 - [ANDGPU] getMemOperandsWithOffset: support BUF non-stack-access instructions with resource but no vaddr</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll#2252cac6</link>
        <description>[ANDGPU] getMemOperandsWithOffset: support BUF non-stack-access instructions with resource but no vaddrSummary:This enables clustering for many more BUF instructions.Reviewers: rampitec, arsenm, nhaehnleSubscribers: jvesely, wdng, hiraditya, kerbowa, llvm-commitsTags: #llvmDifferential Revision: https://reviews.llvm.org/D73868

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll</description>
        <pubDate>Fri, 20 Dec 2019 14:59:15 +0000</pubDate>
        <dc:creator>Jay Foad &lt;jay.foad@amd.com&gt;</dc:creator>
    </item>
<item>
        <title>6d71be4e - AMDGPU: Be explicit about whether the high-word in SI_PC_ADD_REL_OFFSET is 0</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll#6d71be4e</link>
        <description>AMDGPU: Be explicit about whether the high-word in SI_PC_ADD_REL_OFFSET is 0Summary:Instead of encoding a high-word of 0 using a fake TargetGlobalAddress,just use a literal target constant. This simplifies some subsequent changes.The generated assembly is now more explicit about the kind of relocationthat is to be used.Change-Id: I066835202d23b5941fa7a358eb4b89e9b71ab6f8Reviewers: arsenm, rampitecSubscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commitsTags: #llvmDifferential Revision: https://reviews.llvm.org/D61491llvm-svn: 363516

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll</description>
        <pubDate>Sun, 16 Jun 2019 17:32:01 +0000</pubDate>
        <dc:creator>Nicolai Haehnle &lt;nhaehnle@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>0124b548 - [AMDGPU] Change constant addr space to 4</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll#0124b548</link>
        <description>[AMDGPU] Change constant addr space to 4Differential Revision: https://reviews.llvm.org/D43170llvm-svn: 325030

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll</description>
        <pubDate>Tue, 13 Feb 2018 18:00:25 +0000</pubDate>
        <dc:creator>Yaxun Liu &lt;Yaxun.Liu@amd.com&gt;</dc:creator>
    </item>
<item>
        <title>1e68724d - Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll#1e68724d</link>
        <description>Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)Summary: This is a resurrection of work first proposed and discussed in Aug 2015:   http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.htmland initially landed (but then backed out) in Nov 2015:   http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.html The @llvm.memcpy/memmove/memset intrinsics currently have an explicit argumentwhich is required to be a constant integer. It represents the alignment of thedest (and source), and so must be the minimum of the actual alignment of thetwo. This change is the first in a series that allows source and dest to eachhave their own alignments by using the alignment attribute on their arguments. In this change we:1) Remove the alignment argument.2) Add alignment attributes to the source &amp; dest arguments. We, temporarily,   require that the alignments for source &amp; dest be equal. For example, code which used to read:  call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 100, i32 4, i1 false)will now read  call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %dest, i8* align 4 %src, i32 100, i1 false) Downstream users may have to update their lit tests that check for@llvm.memcpy/memmove/memset call/declaration patterns. The following extended sed scriptmay help with updating the majority of your tests, but it does not catch all possiblepatterns so some manual checking and updating will be required.s~declare void @llvm\.mem(set|cpy|move)\.p([^(]*)\((.*), i32, i1\)~declare void @llvm.mem\1.p\2(\3, i1)~gs~call void @llvm\.memset\.p([^(]*)i8\(i8([^*]*)\* (.*), i8 (.*), i8 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i8(i8\2* \3, i8 \4, i8 \5, i1 \6)~gs~call void @llvm\.memset\.p([^(]*)i16\(i8([^*]*)\* (.*), i8 (.*), i16 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i16(i8\2* \3, i8 \4, i16 \5, i1 \6)~gs~call void @llvm\.memset\.p([^(]*)i32\(i8([^*]*)\* (.*), i8 (.*), i32 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i32(i8\2* \3, i8 \4, i32 \5, i1 \6)~gs~call void @llvm\.memset\.p([^(]*)i64\(i8([^*]*)\* (.*), i8 (.*), i64 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i64(i8\2* \3, i8 \4, i64 \5, i1 \6)~gs~call void @llvm\.memset\.p([^(]*)i128\(i8([^*]*)\* (.*), i8 (.*), i128 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i128(i8\2* \3, i8 \4, i128 \5, i1 \6)~gs~call void @llvm\.memset\.p([^(]*)i8\(i8([^*]*)\* (.*), i8 (.*), i8 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i8(i8\2* align \6 \3, i8 \4, i8 \5, i1 \7)~gs~call void @llvm\.memset\.p([^(]*)i16\(i8([^*]*)\* (.*), i8 (.*), i16 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i16(i8\2* align \6 \3, i8 \4, i16 \5, i1 \7)~gs~call void @llvm\.memset\.p([^(]*)i32\(i8([^*]*)\* (.*), i8 (.*), i32 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i32(i8\2* align \6 \3, i8 \4, i32 \5, i1 \7)~gs~call void @llvm\.memset\.p([^(]*)i64\(i8([^*]*)\* (.*), i8 (.*), i64 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i64(i8\2* align \6 \3, i8 \4, i64 \5, i1 \7)~gs~call void @llvm\.memset\.p([^(]*)i128\(i8([^*]*)\* (.*), i8 (.*), i128 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i128(i8\2* align \6 \3, i8 \4, i128 \5, i1 \7)~gs~call void @llvm\.mem(cpy|move)\.p([^(]*)i8\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i8 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i8(i8\3* \4, i8\5* \6, i8 \7, i1 \8)~gs~call void @llvm\.mem(cpy|move)\.p([^(]*)i16\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i16 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i16(i8\3* \4, i8\5* \6, i16 \7, i1 \8)~gs~call void @llvm\.mem(cpy|move)\.p([^(]*)i32\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i32 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i32(i8\3* \4, i8\5* \6, i32 \7, i1 \8)~gs~call void @llvm\.mem(cpy|move)\.p([^(]*)i64\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i64 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i64(i8\3* \4, i8\5* \6, i64 \7, i1 \8)~gs~call void @llvm\.mem(cpy|move)\.p([^(]*)i128\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i128 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i128(i8\3* \4, i8\5* \6, i128 \7, i1 \8)~gs~call void @llvm\.mem(cpy|move)\.p([^(]*)i8\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i8 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i8(i8\3* align \8 \4, i8\5* align \8 \6, i8 \7, i1 \9)~gs~call void @llvm\.mem(cpy|move)\.p([^(]*)i16\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i16 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i16(i8\3* align \8 \4, i8\5* align \8 \6, i16 \7, i1 \9)~gs~call void @llvm\.mem(cpy|move)\.p([^(]*)i32\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i32 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i32(i8\3* align \8 \4, i8\5* align \8 \6, i32 \7, i1 \9)~gs~call void @llvm\.mem(cpy|move)\.p([^(]*)i64\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i64 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i64(i8\3* align \8 \4, i8\5* align \8 \6, i64 \7, i1 \9)~gs~call void @llvm\.mem(cpy|move)\.p([^(]*)i128\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i128 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i128(i8\3* align \8 \4, i8\5* align \8 \6, i128 \7, i1 \9)~g The remaining changes in the series will:Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing   source and dest alignments.Step 3) Update Clang to use the new IRBuilder API.Step 4) Update Polly to use the new IRBuilder API.Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API,        and those that use use MemIntrinsicInst::[get|set]Alignment() to use        getDestAlignment() and getSourceAlignment() instead.Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the        MemIntrinsicInst::[get|set]Alignment() methods.Reviewers: pete, hfinkel, lhames, reames, bolluReviewed By: reamesSubscribers: niosHD, reames, jholewinski, qcolombet, jfb, sanjoy, arsenm, dschuff, dylanmckay, mehdi_amini, sdardis, nemanjai, david2050, nhaehnle, javed.absar, sbc100, jgravelle-google, eraman, aheejin, kbarton, JDevlieghere, asb, rbar, johnrusso, simoncook, jordy.potman.lists, apazos, sabuasal, llvm-commitsDifferential Revision: https://reviews.llvm.org/D41675llvm-svn: 322965

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll</description>
        <pubDate>Fri, 19 Jan 2018 17:13:12 +0000</pubDate>
        <dc:creator>Daniel Neilson &lt;dneilson@azul.com&gt;</dc:creator>
    </item>
<item>
        <title>8728c5f2 - AMDGPU: Cleanup subtarget features</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll#8728c5f2</link>
        <description>AMDGPU: Cleanup subtarget featuresTry to avoid mutually exclusive features. Don&apos;t usea real default GPU, and use a fake &quot;generic&quot;. The goalis to make it easier to see which set of features areincompatible between feature strings.Most of the test changes are due to random scheduling changesfrom not having a default fullspeed model.llvm-svn: 310258

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll</description>
        <pubDate>Mon, 07 Aug 2017 14:58:04 +0000</pubDate>
        <dc:creator>Matt Arsenault &lt;Matthew.Arsenault@amd.com&gt;</dc:creator>
    </item>
<item>
        <title>3dbeefa9 - AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll#3dbeefa9</link>
        <description>AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernelCurrently the default C calling convention functions are treatedthe same as compute kernels. Make this explicit so the defaultcalling convention can be changed to a non-kernel.Converted with perl -pi -e &apos;s/define void/define amdgpu_kernel void/&apos;on the relevant test directories (and undoing in one place that actuallywanted a non-kernel).llvm-svn: 298444

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll</description>
        <pubDate>Tue, 21 Mar 2017 21:39:51 +0000</pubDate>
        <dc:creator>Matt Arsenault &lt;Matthew.Arsenault@amd.com&gt;</dc:creator>
    </item>
<item>
        <title>7aad8fd8 - Enable FeatureFlatForGlobal on Volcanic Islands</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll#7aad8fd8</link>
        <description>Enable FeatureFlatForGlobal on Volcanic IslandsThis switches to the workaround that HSA defaults tofor the mesa path.This should be applied to the 4.0 branch.Patch by Vedran Mileti&#263; &lt;vedran@miletic.net&gt;llvm-svn: 292982

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll</description>
        <pubDate>Tue, 24 Jan 2017 22:02:15 +0000</pubDate>
        <dc:creator>Matt Arsenault &lt;Matthew.Arsenault@amd.com&gt;</dc:creator>
    </item>
<item>
        <title>08326b62 - [AMDGPU] Emit constant address space data in .rodata section and use relocations instead of fixups (amdhsa only)</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll#08326b62</link>
        <description>[AMDGPU] Emit constant address space data in .rodata section and use relocations instead of fixups (amdhsa only)Differential Revision: https://reviews.llvm.org/D25693llvm-svn: 284759

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll</description>
        <pubDate>Thu, 20 Oct 2016 18:12:38 +0000</pubDate>
        <dc:creator>Konstantin Zhuravlyov &lt;kzhuravl_dev@outlook.com&gt;</dc:creator>
    </item>
<item>
        <title>749035b7 - AMDGPU: Fix shouldConvertConstantLoadToIntImm behavior</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll#749035b7</link>
        <description>AMDGPU: Fix shouldConvertConstantLoadToIntImm behaviorThis should really be true for any immediate, not justinline ones.llvm-svn: 277260

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll</description>
        <pubDate>Sat, 30 Jul 2016 01:40:36 +0000</pubDate>
        <dc:creator>Matt Arsenault &lt;Matthew.Arsenault@amd.com&gt;</dc:creator>
    </item>
<item>
        <title>71369b3a - AMDGPU/SI: Enable load-store-opt by default.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll#71369b3a</link>
        <description>AMDGPU/SI: Enable load-store-opt by default.Summary: Enable load-store-opt by default, and update LIT tests.Reviewers: arsenmDifferential Revision: http://reviews.llvm.org/D20694llvm-svn: 270894

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll</description>
        <pubDate>Thu, 26 May 2016 19:35:29 +0000</pubDate>
        <dc:creator>Changpeng Fang &lt;changpeng.fang@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>1d5e6d4b - AMDGPU/SI: Improve MachineSchedModel definition</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll#1d5e6d4b</link>
        <description>AMDGPU/SI: Improve MachineSchedModel definitionThis patch contains a few improvements to the model, including:- Using a single resource with a defined buffers size for each memory unit.- Setting the IssueWidth correctly.- Fixing latency values for memory instructions.shader-db stats:16429 shaders in 3231 testsTotals:SGPRS: 318232 -&gt; 312328 (-1.86 %)VGPRS: 208996 -&gt; 209346 (0.17 %)Code Size: 7147044 -&gt; 7166440 (0.27 %) bytesLDS: 83 -&gt; 83 (0.00 %) blocksScratch: 1862656 -&gt; 1459200 (-21.66 %) bytes per waveMax Waves: 49182 -&gt; 49243 (0.12 %)Wait states: 0 -&gt; 0 (0.00 %)ADifferential Revision: http://reviews.llvm.org/D18453llvm-svn: 264877

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll</description>
        <pubDate>Wed, 30 Mar 2016 16:35:13 +0000</pubDate>
        <dc:creator>Tom Stellard &lt;thomas.stellard@amd.com&gt;</dc:creator>
    </item>
<item>
        <title>ff05da80 - AMDGPU: Split LDS vector loads</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll#ff05da80</link>
        <description>AMDGPU: Split LDS vector loadsIf properly aligned this could allow using ds_read_b64.llvm-svn: 253975

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll</description>
        <pubDate>Tue, 24 Nov 2015 12:18:54 +0000</pubDate>
        <dc:creator>Matt Arsenault &lt;Matthew.Arsenault@amd.com&gt;</dc:creator>
    </item>
<item>
        <title>67cf9a72 - Revert &quot;Change memcpy/memset/memmove to have dest and source alignments.&quot;</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll#67cf9a72</link>
        <description>Revert &quot;Change memcpy/memset/memmove to have dest and source alignments.&quot;This reverts commit r253511.This likely broke the bots inhttp://lab.llvm.org:8011/builders/clang-ppc64-elf-linux2/builds/20202http://bb.pgr.jp/builders/clang-3stage-i686-linux/builds/3787llvm-svn: 253543

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll</description>
        <pubDate>Thu, 19 Nov 2015 05:56:52 +0000</pubDate>
        <dc:creator>Pete Cooper &lt;peter_cooper@apple.com&gt;</dc:creator>
    </item>
<item>
        <title>72bc23ef - Change memcpy/memset/memmove to have dest and source alignments.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll#72bc23ef</link>
        <description>Change memcpy/memset/memmove to have dest and source alignments.Note, this was reviewed (and more details are in) http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.htmlThese intrinsics currently have an explicit alignment argument which isrequired to be a constant integer.  It represents the alignment of thesource and dest, and so must be the minimum of those.This change allows source and dest to each have their own alignmentsby using the alignment attribute on their arguments.  The alignmentargument itself is removed.There are a few places in the code for which the code needs to bechecked by an expert as to whether using only src/dest alignment issafe.  For those places, they currently take the minimum of src/destalignments which matches the current behaviour.For example, code which used to read:  call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i32 8, i1 false)will now read:  call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %dest, i8* align 8 %src, i32 500, i1 false)For out of tree owners, I was able to strip alignment from calls using sed by replacing:  (call.*llvm\.memset.*)i32\ [0-9]*\,\ i1 false\)with:  $1i1 false)and similarly for memmove and memcpy.I then added back in alignment to test cases which needed it.A similar commit will be made to clang which actually has many differences in alignment as nowIRBuilder can generate different source/dest alignments on calls.In IRBuilder itself, a new argument was added.  Instead of calling:  CreateMemCpy(Dst, Src, getInt64(Size), DstAlign, /* isVolatile */ false)you now call  CreateMemCpy(Dst, Src, getInt64(Size), DstAlign, SrcAlign, /* isVolatile */ false)There is a temporary class (IntegerAlignment) which takes the source alignment and rejectsimplicit conversion from bool.  This is to prevent isVolatile here from passing its defaultparameter to the source alignment.Note, changes in future can now be made to codegen.  I didn&apos;t change anything here, but thischange should enable better memcpy code sequences.Reviewed by Hal Finkel.llvm-svn: 253511

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll</description>
        <pubDate>Wed, 18 Nov 2015 22:17:24 +0000</pubDate>
        <dc:creator>Pete Cooper &lt;peter_cooper@apple.com&gt;</dc:creator>
    </item>
<item>
        <title>45bb48ea - R600 -&gt; AMDGPU rename</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll#45bb48ea</link>
        <description>R600 -&gt; AMDGPU renamellvm-svn: 239657

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll</description>
        <pubDate>Sat, 13 Jun 2015 03:28:10 +0000</pubDate>
        <dc:creator>Tom Stellard &lt;thomas.stellard@amd.com&gt;</dc:creator>
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