en Copyright 2015 Java http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.dwordx3.ll#a343b9b0 Revert "[AMDGPU] Insert waitcnt after returning from call"This reverts commit ca907bfb57d8ad3ec3bcc2cff2abab7b1b933af6.According to michel.daenzer,> This completely broke the Mesa radeonsi driver on Navi 14. Xorg +> xterm come up with major corruption & psychedelic colours. List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.dwordx3.ll Wed, 23 Sep 2020 15:16:39 +0000 Sebastian Neubauer <sebastian.neubauer@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.dwordx3.ll#ca907bfb [AMDGPU] Insert waitcnt after returning from callWhen memory operations are outstanding on function calls, either thecaller or the callee can insert a waitcnt to ensure that all reads arefinished.Calls need some time to be executed, so if the callee inserts thewaitcnt, filling the instruction buffer and waiting for memory will beinterleaved, hiding some latency. This comes at the cost of having awaitcnt inside functions that may not be needed as no memory operationsare outstanding.For function calls, this is already implemented. The same principalapplies to returns: If the caller inserts a waitcnt after the call, thecallee does not have to wait and the return and memory operation can berun in parallel.This commit implements waiting in the caller after returning from afunction call.Differential Revision: https://reviews.llvm.org/D87674 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.dwordx3.ll Fri, 04 Sep 2020 10:36:29 +0000 Sebastian Neubauer <sebastian.neubauer@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.dwordx3.ll#677387d8 [AMDGPU] Implemented dwordx3 variants of buffer/tbuffer load/store intrinsicsNow we have vec3 MVTs, this commit implements dwordx3 variants of thebuffer intrinsics.On gfx6, a dwordx3 buffer load intrinsic is implemented as a dwordx4instruction, and a dwordx3 buffer store intrinsic is not supported.We need to support the dwordx3 load intrinsic because it is generated bysubtarget-unaware code in InstCombine.Differential Revision: https://reviews.llvm.org/D58904Change-Id: I016729d8557b98a52f529638ae97c340a5922a4ellvm-svn: 356755 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.dwordx3.ll Fri, 22 Mar 2019 14:58:02 +0000 Tim Renouf <tpr.llvm@botech.co.uk>