en Copyright 2015 Java http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll#f510045d [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC.Take advantage of D117117 to simplify all {{\[}} to [ and {{\]}} to ].Differential Revision: https://reviews.llvm.org/D117298 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll Fri, 14 Jan 2022 11:03:21 +0000 Jay Foad <jay.foad@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll#da067ed5 [AMDGPU] Set most sched model resource's BufferSize to oneUsing a BufferSize of one for memory ProcResources will result in betterILP since it more accurately models the dependencies between memory opsand their consumers on an in-order processor. After this change, thescheduler will treat the data edges from loads as blocking so thatstalls are guaranteed when waiting for data to be retreaved from memory.Since we don't actually track waitcnt here, this should do a better jobat modeling their behavior.Practically, this means that the scheduler will trigger the 'STALL'heuristic more often.This type of change needs to be evaluated experimentally. Preliminaryresults are positive.Fixes: SWDEV-282962Reviewed By: rampitecDifferential Revision: https://reviews.llvm.org/D114777 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll Wed, 10 Nov 2021 17:59:31 +0000 Austin Kerbow <Austin.Kerbow@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll#c1cd42d6 [NFC] Removed unused prefixes in CodeGen/AMDGPUThis covers the tests starting with h-k.Differential Revision: https://reviews.llvm.org/D94147 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll Wed, 06 Jan 2021 03:24:37 +0000 Mircea Trofin <mtrofin@google.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll#d2e52eec AMDGPU: Select global saddr mode from SGPR pointerUse the 64-bit SGPR base with a 0 offset, since it's 1 fewerinstruction to materialize the 0 vs. the 64-bit copy. List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll Tue, 10 Nov 2020 16:06:59 +0000 Matt Arsenault <Matthew.Arsenault@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll#3fdf3b15 AMDGPU: Update AMDHSA code object version handlingDifferential Revision: https://reviews.llvm.org/D89076 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll Wed, 14 Oct 2020 17:03:37 +0000 Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll#1168119c AMDGPU: Start interpreting byref on kernel argumentsThese are treated identically to value aggregates placed in the kernelargument list. A %struct.foo or %struct.foo addrspace(4)*byref(sizeof(%struct.foo)) align(alignof(%struct.foo)) argument shouldproduce the same offsets and argument metadata.This handles all 3 kernel ABI implementations, and the two HSAmetadata emission paths. List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll Thu, 07 May 2020 14:47:25 +0000 Matt Arsenault <Matthew.Arsenault@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll#f734ce04 AMDGPU: Fix crash on v3i15 kernel argumentsThis was split into 3 i15 arguments. The i15 piece needs to be roundedto a simple MVT for the memory type. List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll Tue, 11 Feb 2020 19:33:50 +0000 Matt Arsenault <Matthew.Arsenault@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll#b777e551 [MachineScheduler] Reduce reordering due to mem op clusteringSummary:Mem op clustering adds a weak edge in the DAG between two loads orstores that should be clustered, but the direction of this edge ispretty arbitrary (it depends on the sort order of MemOpInfo, whichrepresents the operands of a load or store). This often means that twoloads or stores will get reordered even if they would naturally havebeen scheduled together anyway, which leads to test case churn and goesagainst the scheduler's "do no harm" philosophy.The fix makes sure that the direction of the edge always matches theoriginal code order of the instructions.Reviewers: atrick, MatzeB, arsenm, rampitec, t.p.northoverSubscribers: jvesely, wdng, nhaehnle, kristof.beyls, hiraditya, javed.absar, arphaman, llvm-commitsTags: #llvmDifferential Revision: https://reviews.llvm.org/D72706 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll Tue, 14 Jan 2020 15:40:52 +0000 Jay Foad <jay.foad@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll#a25e0524 AMDGPU: Enable code object v3 for AMDHSA onlyDifferential Revision: https://reviews.llvm.org/D54186llvm-svn: 346923 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll Thu, 15 Nov 2018 02:32:43 +0000 Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll#2d22d24a Revert r345542: AMDGPU: Enable code object v3 by defaultIt breaks mesa.llvm-svn: 345662 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll Tue, 30 Oct 2018 22:02:40 +0000 Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll#5cb95020 AMDGPU: Enable code object v3 by defaultDifferential Revision: https://reviews.llvm.org/D53525llvm-svn: 345542 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll Mon, 29 Oct 2018 21:07:27 +0000 Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll#4bec7d42 Reapply "AMDGPU: Fix handling of alignment padding in DAG argument lowering"Reverts r337079 with fix for msan error.llvm-svn: 337535 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll Fri, 20 Jul 2018 09:05:08 +0000 Matt Arsenault <Matthew.Arsenault@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll#de950777 AMDGPU: Fix handling of alignment padding in DAG argument loweringThis was completely broken if there was ever a struct argument, asthis information is thrown away during the argument analysis.The offsets as passed in to LowerFormalArguments are not useful,as they partially depend on the legalized result register type,and they don't consider the alignment in the first place.Ignore the Ins array, and instead figure out from the raw IR typewhat we need to do. This seems to fix the padding computationif the DAG lowering is forced (and stops breaking argumentsfollowing padded arguments if the arguments were only partiallylowered in the IR)llvm-svn: 337021 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll Fri, 13 Jul 2018 16:40:25 +0000 Matt Arsenault <Matthew.Arsenault@amd.com>