en Copyright 2015 Java http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/image-schedule.ll#9de2fb58 AMDGPU: Fix some outdated datalayouts in testsllvm-svn: 342131 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/image-schedule.ll Thu, 13 Sep 2018 11:56:28 +0000 Matt Arsenault <Matthew.Arsenault@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/image-schedule.ll#1045928a AMDGPU: Convert test cases to the dimension-aware intrinsicsSummary:Also explicitly port over some tests in llvm.amdgcn.image.* that weremissing. Some tests are removed because they no longer apply (i.e.explicitly testing building an address vector via insertelement).This is in preparation for the eventual removal of the old-styleintrinsics.Some additional notes:- constant-address-space-32bit.ll: change some GCN-NEXT to GCN because the instruction schedule was subtly altered- insert_vector_elt.ll: the old test didn't actually test anything, because %tmp1 was not used; remove the load, because it doesn't work (Because of the amdgpu_ps calling convention? In any case, it's orthogonal to what the test claims to be testing.)Change-Id: Idfa99b6512ad139e755e82b8b89548ab08f0afcfReviewers: arsenm, rampitecSubscribers: MatzeB, qcolombet, kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, javed.absar, llvm-commitsDifferential Revision: https://reviews.llvm.org/D48018llvm-svn: 335229 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/image-schedule.ll Thu, 21 Jun 2018 13:37:19 +0000 Nicolai Haehnle <nhaehnle@gmail.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/image-schedule.ll#0124b548 [AMDGPU] Change constant addr space to 4Differential Revision: https://reviews.llvm.org/D43170llvm-svn: 325030 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/image-schedule.ll Tue, 13 Feb 2018 18:00:25 +0000 Yaxun Liu <Yaxun.Liu@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/image-schedule.ll#75ced9d5 [AMDGPU] stop image_store being moved illegallySummary:A recent change321556: AMDGPU: Remove mayLoad/hasSideEffects from MIMG storescan allow the machine instruction scheduler to move an image store pastan image load using the same descriptor.V2: Fixed by marking image ops as mayAlias and isAliased. This may beoverly conservative, and we may need to revisit.V3: Reverted test change done on 321556.Reviewers: arsenm, nhaehnle, dstuttardSubscribers: llvm-commits, t-tye, yaxunl, wdng, kzhuravlDifferential Revision: https://reviews.llvm.org/D41969llvm-svn: 322419 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/image-schedule.ll Fri, 12 Jan 2018 22:57:24 +0000 Tim Renouf <tpr.llvm@botech.co.uk>