en Copyright 2015 Java http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll#04f7a4d2 [AMDGPU] Add and update scalar instructionsThis patch adds support for S_ANDN2, S_ORN2 32-bit and 64-bit instructions and adds splits to move them to the vector unit (for which there is no equivalent instruction). It modifies the way that the more complex scalar instructions are lowered to vector instructions by first breaking them down to sequences of simpler scalar instructions which are then lowered through the existing code paths. The pattern for S_XNOR has also been updated to apply inversion to one input rather than the output of the XOR as the result is equivalent and may allow leaving the NOT instruction on the scalar unit.A new tests for NAND, NOR, ANDN2 and ORN2 have been added, and existing tests now hit the new instructions (and have been modified accordingly).Differential: https://reviews.llvm.org/D54714llvm-svn: 347877 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll Thu, 29 Nov 2018 16:05:38 +0000 Graham Sellers <graham.sellers@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll#36b4b0be AMDGPU: Remove -mcpu=SILeftover from before amdgcn/r600 split.llvm-svn: 310277 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll Mon, 07 Aug 2017 18:30:35 +0000 Matt Arsenault <Matthew.Arsenault@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll#982aee6a [AMDGPU] Switch scalarize global loads ON by defaultDifferential revision: https://reviews.llvm.org/D34407llvm-svn: 307097 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll Tue, 04 Jul 2017 17:32:00 +0000 Alexander Timofeev <Alexander.Timofeev@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll#e4a74137 Revert r307026, "[AMDGPU] Switch scalarize global loads ON by default"It broke a testcase. Failing Tests (1): LLVM :: CodeGen/AMDGPU/alignbit-pat.llllvm-svn: 307054 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll Tue, 04 Jul 2017 02:14:18 +0000 NAKAMURA Takumi <geek4civic@gmail.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll#ea7f08be [AMDGPU] Switch scalarize global loads ON by defaultDifferential revision: https://reviews.llvm.org/D34407llvm-svn: 307026 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll Mon, 03 Jul 2017 14:54:11 +0000 Alexander Timofeev <Alexander.Timofeev@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll#3dbeefa9 AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernelCurrently the default C calling convention functions are treatedthe same as compute kernels. Make this explicit so the defaultcalling convention can be changed to a non-kernel.Converted with perl -pi -e 's/define void/define amdgpu_kernel void/'on the relevant test directories (and undoing in one place that actuallywanted a non-kernel).llvm-svn: 298444 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll Tue, 21 Mar 2017 21:39:51 +0000 Matt Arsenault <Matthew.Arsenault@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll#1e374a7a AMDGPU: Define a schedule class for COPY.COPY was lacking a scheduling class, define it to avoid regressions inthe upcoming change to the bidirectional MachineScheduler. Approved bytstellar on IRC.Differential Revision: http://reviews.llvm.org/D21540llvm-svn: 273751 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll Fri, 24 Jun 2016 23:52:11 +0000 Matthias Braun <matze@braunis.de> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll#b6be2027 AMDGPU: Use s_addk_i32 / s_mulk_i32llvm-svn: 266506 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll Sat, 16 Apr 2016 01:46:49 +0000 Matt Arsenault <Matthew.Arsenault@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll#1d5e6d4b AMDGPU/SI: Improve MachineSchedModel definitionThis patch contains a few improvements to the model, including:- Using a single resource with a defined buffers size for each memory unit.- Setting the IssueWidth correctly.- Fixing latency values for memory instructions.shader-db stats:16429 shaders in 3231 testsTotals:SGPRS: 318232 -> 312328 (-1.86 %)VGPRS: 208996 -> 209346 (0.17 %)Code Size: 7147044 -> 7166440 (0.27 %) bytesLDS: 83 -> 83 (0.00 %) blocksScratch: 1862656 -> 1459200 (-21.66 %) bytes per waveMax Waves: 49182 -> 49243 (0.12 %)Wait states: 0 -> 0 (0.00 %)ADifferential Revision: http://reviews.llvm.org/D18453llvm-svn: 264877 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll Wed, 30 Mar 2016 16:35:13 +0000 Tom Stellard <thomas.stellard@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll#0967c91e Revert "Remove unnecessary call to getAllocatableRegClass"This reverts commit r252565.This also includes the revert of the commit mentioned below in order toavoid breaking tests in AMDGPU:Revert "AMDGPU: Set isAllocatable = 0 on VS_32/VS_64"This reverts commit r252674.llvm-svn: 252956 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll Thu, 12 Nov 2015 21:43:25 +0000 Tom Stellard <thomas.stellard@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll#6690d7de AMDGPU: Set isAllocatable = 0 on VS_32/VS_64llvm-svn: 252674 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll Wed, 11 Nov 2015 00:01:32 +0000 Matt Arsenault <Matthew.Arsenault@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll#61dc235f DAGCombiner: Combine extract_vector_elt from build_vectorThis basic combine was surprisingly missing.AMDGPU legalizes many operations in terms of 32-bit vector components,so not doing this results in many extra copies and subregister extractsthat need to be cleaned up later.InstCombine already does this for the hasOneUse case. The target hookis to fix a handful of tests which break (e.g. ARM/vmov.ll) which turnfrom a vector materialize repeated immediate instruction to a constantvector load with more scalar copies from it.llvm-svn: 250129 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll Mon, 12 Oct 2015 23:59:50 +0000 Matt Arsenault <Matthew.Arsenault@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll#45bb48ea R600 -> AMDGPU renamellvm-svn: 239657 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll Sat, 13 Jun 2015 03:28:10 +0000 Tom Stellard <thomas.stellard@amd.com>