Changes in fneg.ll

3eb2281b - [AMDGPU] Aggressively fold immediates in SIFoldOperands

Mon, 16 May 2022 14:48:11 +0000

[AMDGPU] Aggressively fold immediates in SIFoldOperandsPreviously SIFoldOperands::foldInstOperand would only fold anon-inlinable immediate into a single user, so as not to increase codesize by adding the same 32-bit literal operand to many instructions.This patch removes that restriction, so that a non-inlinable immediatewill be folded into any number of users. The rationale is:- It reduces the number of registers used for holding constant values, which might increase occupancy. (On the other hand, many of these registers are SGPRs which no longer affect occupancy on GFX10+.)- It reduces ALU stalls between the instruction that loads a constant into a register, and the instruction that uses it.- The above benefits are expected to outweigh any increase in code size.Differential Revision: https://reviews.llvm.org/D114643 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/fneg.ll

c4d256a5 - [AMDGPU] Come back patch for the 'Assign register class for cross block values according to the divergence.'

Mon, 14 Oct 2019 12:01:10 +0000

[AMDGPU] Come back patch for the 'Assign register class for cross block values according to the divergence.' Detailed description: After https://reviews.llvm.org/D59990 submit several issues were discovered. Changes in common code were preserved but AMDGPU specific part was reverted to keep the backend working correctly. Discovered issues were addressed in the following commits: https://reviews.llvm.org/D67662 https://reviews.llvm.org/D67101 https://reviews.llvm.org/D63953 https://reviews.llvm.org/D63731 This change brings back AMDGPU specific changes. Reviewed by: rampitec, arsenm Differential Revision: https://reviews.llvm.org/D68635llvm-svn: 374767 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/fneg.ll

e1895aba - AMDGPU/GlobalISel: Select G_FABS/G_FNEG

Tue, 10 Sep 2019 17:19:46 +0000

AMDGPU/GlobalISel: Select G_FABS/G_FNEGf64 doesn't work yet because tablegen currently doesn't handldeREG_SEQUENCE.This does regress some multi use VALU fneg cases since now theimmediate remains in an SGPR, and more moves are used for legalizingthe xor. This is a SIFixSGPRCopies deficiency.llvm-svn: 371540 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/fneg.ll

e11d8aca - AMDGPU: Implement hasBitPreservingFPLogic

Fri, 13 Oct 2017 21:10:22 +0000

AMDGPU: Implement hasBitPreservingFPLogicllvm-svn: 315754 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/fneg.ll

3dbeefa9 - AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

Tue, 21 Mar 2017 21:39:51 +0000

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernelCurrently the default C calling convention functions are treatedthe same as compute kernels. Make this explicit so the defaultcalling convention can be changed to a non-kernel.Converted with perl -pi -e 's/define void/define amdgpu_kernel void/'on the relevant test directories (and undoing in one place that actuallywanted a non-kernel).llvm-svn: 298444 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/fneg.ll

7aad8fd8 - Enable FeatureFlatForGlobal on Volcanic Islands

Tue, 24 Jan 2017 22:02:15 +0000

Enable FeatureFlatForGlobal on Volcanic IslandsThis switches to the workaround that HSA defaults tofor the mesa path.This should be applied to the 4.0 branch.Patch by Vedran Miletić llvm-svn: 292982 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/fneg.ll

c79dc70d - AMDGPU: Fix f16 fabs/fneg

Tue, 15 Nov 2016 02:25:28 +0000

AMDGPU: Fix f16 fabs/fnegllvm-svn: 286931 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/fneg.ll

45bb48ea - R600 -> AMDGPU rename

Sat, 13 Jun 2015 03:28:10 +0000

R600 -> AMDGPU renamellvm-svn: 239657 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/fneg.ll