en Copyright 2015 Java http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/cttz.ll#3eb2281b [AMDGPU] Aggressively fold immediates in SIFoldOperandsPreviously SIFoldOperands::foldInstOperand would only fold anon-inlinable immediate into a single user, so as not to increase codesize by adding the same 32-bit literal operand to many instructions.This patch removes that restriction, so that a non-inlinable immediatewill be folded into any number of users. The rationale is:- It reduces the number of registers used for holding constant values, which might increase occupancy. (On the other hand, many of these registers are SGPRs which no longer affect occupancy on GFX10+.)- It reduces ALU stalls between the instruction that loads a constant into a register, and the instruction that uses it.- The above benefits are expected to outweigh any increase in code size.Differential Revision: https://reviews.llvm.org/D114643 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/cttz.ll Mon, 16 May 2022 14:48:11 +0000 Jay Foad <jay.foad@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/cttz.ll#da067ed5 [AMDGPU] Set most sched model resource's BufferSize to oneUsing a BufferSize of one for memory ProcResources will result in betterILP since it more accurately models the dependencies between memory opsand their consumers on an in-order processor. After this change, thescheduler will treat the data edges from loads as blocking so thatstalls are guaranteed when waiting for data to be retreaved from memory.Since we don't actually track waitcnt here, this should do a better jobat modeling their behavior.Practically, this means that the scheduler will trigger the 'STALL'heuristic more often.This type of change needs to be evaluated experimentally. Preliminaryresults are positive.Fixes: SWDEV-282962Reviewed By: rampitecDifferential Revision: https://reviews.llvm.org/D114777 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/cttz.ll Wed, 10 Nov 2021 17:59:31 +0000 Austin Kerbow <Austin.Kerbow@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/cttz.ll#57b9107e [GlobalISel] Improve widening of cttz/cttz_zero_undefDifferential Revision: https://reviews.llvm.org/D107631 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/cttz.ll Fri, 06 Aug 2021 10:05:42 +0000 Jay Foad <jay.foad@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/cttz.ll#83610d4e [AMDGPU][GlobalISel] Better legalization of 32-bit ctlz/cttzDifferential Revision: https://reviews.llvm.org/D107474 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/cttz.ll Tue, 03 Aug 2021 16:11:08 +0000 Jay Foad <jay.foad@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/cttz.ll#24b67a90 [AMDGPU][GlobalISel] Improve regbankselect for 64-bit VGPR ctlz_zero_undef/cttz_zero_undefWe can improve on the generic splitting by using ffbh/ffbl, which have adefined result when the input is zero.Differential Revision: https://reviews.llvm.org/D107442 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/cttz.ll Wed, 04 Aug 2021 10:55:29 +0000 Jay Foad <jay.foad@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/cttz.ll#2b639331 [AMDGPU][SDag] Better lowering for 32-bit ctlz/cttzDifferential Revision: https://reviews.llvm.org/D107566 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/cttz.ll Thu, 05 Aug 2021 13:32:25 +0000 Jay Foad <jay.foad@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/cttz.ll#e6c364a6 [AMDGPU][SDag] Better lowering for 64-bit ctlz/cttzDifferential Revision: https://reviews.llvm.org/D107546 List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/cttz.ll Thu, 05 Aug 2021 08:58:29 +0000 Jay Foad <jay.foad@amd.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/cttz.ll#ba5c4ac6 [AMDGPU] Add cttz tests and globalisel checks for ctlz List of files: /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/cttz.ll Tue, 03 Aug 2021 16:13:02 +0000 Jay Foad <jay.foad@amd.com>