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    <title>Changes in bswap.ll</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>e2926501 - [AMDGPU] Aggressively fold immediates in SIShrinkInstructions</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll#e2926501</link>
        <description>[AMDGPU] Aggressively fold immediates in SIShrinkInstructionsFold immediates regardless of how many uses they have. This is expectedto increase overall code size, but decrease register usage.Differential Revision: https://reviews.llvm.org/D114644

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll</description>
        <pubDate>Mon, 16 May 2022 14:53:03 +0000</pubDate>
        <dc:creator>Jay Foad &lt;jay.foad@amd.com&gt;</dc:creator>
    </item>
<item>
        <title>da067ed5 - [AMDGPU] Set most sched model resource&apos;s BufferSize to one</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll#da067ed5</link>
        <description>[AMDGPU] Set most sched model resource&apos;s BufferSize to oneUsing a BufferSize of one for memory ProcResources will result in betterILP since it more accurately models the dependencies between memory opsand their consumers on an in-order processor. After this change, thescheduler will treat the data edges from loads as blocking so thatstalls are guaranteed when waiting for data to be retreaved from memory.Since we don&apos;t actually track waitcnt here, this should do a better jobat modeling their behavior.Practically, this means that the scheduler will trigger the &apos;STALL&apos;heuristic more often.This type of change needs to be evaluated experimentally. Preliminaryresults are positive.Fixes: SWDEV-282962Reviewed By: rampitecDifferential Revision: https://reviews.llvm.org/D114777

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll</description>
        <pubDate>Wed, 10 Nov 2021 17:59:31 +0000</pubDate>
        <dc:creator>Austin Kerbow &lt;Austin.Kerbow@amd.com&gt;</dc:creator>
    </item>
<item>
        <title>1ebe86ad - [NFC] Removed unused prefixes in test/CodeGen/AMDGPU</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll#1ebe86ad</link>
        <description>[NFC] Removed unused prefixes in test/CodeGen/AMDGPUMore patches to follow.Differential Revision: https://reviews.llvm.org/D94121

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll</description>
        <pubDate>Tue, 05 Jan 2021 22:15:20 +0000</pubDate>
        <dc:creator>Mircea Trofin &lt;mtrofin@google.com&gt;</dc:creator>
    </item>
<item>
        <title>fdc90277 - [DAG][AMDGPU][X86] Add SimplifyMultipleUseDemandedBits handling for SIGN/ZERO_EXTEND + SIGN/ZERO_EXTEND_VECTOR_INREG</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll#fdc90277</link>
        <description>[DAG][AMDGPU][X86] Add SimplifyMultipleUseDemandedBits handling for SIGN/ZERO_EXTEND + SIGN/ZERO_EXTEND_VECTOR_INREGPeek through multiple use ops like we already do for ANY_EXTEND/ANY_EXTEND_VECTOR_INREGDifferential Revision: https://reviews.llvm.org/D84863

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll</description>
        <pubDate>Wed, 29 Jul 2020 16:33:56 +0000</pubDate>
        <dc:creator>Simon Pilgrim &lt;llvm-dev@redking.me.uk&gt;</dc:creator>
    </item>
<item>
        <title>62fd7f76 - [MachineScheduler] Fix the TopDepth/BotHeightReduce latency heuristics</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll#62fd7f76</link>
        <description>[MachineScheduler] Fix the TopDepth/BotHeightReduce latency heuristicstryLatency compares two sched candidates. For the top zone it prefersthe one with lesser depth, but only if that depth is greater than thetotal latency of the instructions we&apos;ve already scheduled -- otherwiseits latency would be hidden and there would be no stall.Unfortunately it only tests the depth of one of the candidates. This canlead to situations where the TopDepthReduce heuristic does not kick in,but a lower priority heuristic chooses the other candidate, whose depth*is* greater than the already scheduled latency, which causes a stall.The fix is to apply the heuristic if the depth of *either* candidate isgreater than the already scheduled latency.All this also applies to the BotHeightReduce heuristic in the bottomzone.Differential Revision: https://reviews.llvm.org/D72392

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll</description>
        <pubDate>Tue, 07 Jan 2020 15:43:46 +0000</pubDate>
        <dc:creator>Jay Foad &lt;jay.foad@amd.com&gt;</dc:creator>
    </item>
<item>
        <title>8c2c0b36 - AMDGPU: Improve i16/v2i16 bswap</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll#8c2c0b36</link>
        <description>AMDGPU: Improve i16/v2i16 bswap

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll</description>
        <pubDate>Fri, 14 Feb 2020 15:31:38 +0000</pubDate>
        <dc:creator>Matt Arsenault &lt;Matthew.Arsenault@amd.com&gt;</dc:creator>
    </item>
<item>
        <title>e0fd2d6d - AMDGPU: Add baseline tests for 16-bit bswap</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll#e0fd2d6d</link>
        <description>AMDGPU: Add baseline tests for 16-bit bswap

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll</description>
        <pubDate>Fri, 14 Feb 2020 15:15:20 +0000</pubDate>
        <dc:creator>Matt Arsenault &lt;Matthew.Arsenault@amd.com&gt;</dc:creator>
    </item>
<item>
        <title>bfe37794 - AMDGPU: Use v_perm_b32 to implement bswap</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll#bfe37794</link>
        <description>AMDGPU: Use v_perm_b32 to implement bswapAlso greatly improve i64 lowering. LegalizeIntegerTypes does thecorrect narrowing if i64 isn&apos;t legal. Just workaround this forSelectionDAG by making i64 legal and splitting in the patterns.

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll</description>
        <pubDate>Thu, 13 Feb 2020 01:28:38 +0000</pubDate>
        <dc:creator>Matt Arsenault &lt;Matthew.Arsenault@amd.com&gt;</dc:creator>
    </item>
<item>
        <title>2252cac6 - [ANDGPU] getMemOperandsWithOffset: support BUF non-stack-access instructions with resource but no vaddr</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll#2252cac6</link>
        <description>[ANDGPU] getMemOperandsWithOffset: support BUF non-stack-access instructions with resource but no vaddrSummary:This enables clustering for many more BUF instructions.Reviewers: rampitec, arsenm, nhaehnleSubscribers: jvesely, wdng, hiraditya, kerbowa, llvm-commitsTags: #llvmDifferential Revision: https://reviews.llvm.org/D73868

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll</description>
        <pubDate>Fri, 20 Dec 2019 14:59:15 +0000</pubDate>
        <dc:creator>Jay Foad &lt;jay.foad@amd.com&gt;</dc:creator>
    </item>
<item>
        <title>01a4b831 - [codegen,amdgpu] Enhance MIR DIE and re-arrange it for AMDGPU.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll#01a4b831</link>
        <description>[codegen,amdgpu] Enhance MIR DIE and re-arrange it for AMDGPU.Summary:- `dead-mi-elimination` assumes MIR in the SSA form and cannot be  arranged after phi elimination or DeSSA. It&apos;s enhanced to handle the  dead register definition by skipping use check on it. Once a register  def is `dead`, all its uses, if any, should be `undef`.- Re-arrange the DIE in RA phase for AMDGPU by placing it directly after  `detect-dead-lanes`.- Many relevant tests are refined due to different register assignment.Reviewers: rampitec, qcolombet, sunfishSubscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commitsTags: #llvmDifferential Revision: https://reviews.llvm.org/D72709

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll</description>
        <pubDate>Wed, 08 Jan 2020 15:50:23 +0000</pubDate>
        <dc:creator>Michael Liao &lt;michael.hliao@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>2afe8641 - [DAG] Add SimplifyDemandedBits support for BSWAP</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll#2afe8641</link>
        <description>[DAG] Add SimplifyDemandedBits support for BSWAPThis exposes a shortcoming for AArch64, and that is tracked by PR40881:https://bugs.llvm.org/show_bug.cgi?id=40881Patch by: @RKSimon (Simon Pilgrim)Differential Revision: https://reviews.llvm.org/D58017

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll</description>
        <pubDate>Sun, 15 Dec 2019 13:52:34 +0000</pubDate>
        <dc:creator>Sanjay Patel &lt;spatel@rotateright.com&gt;</dc:creator>
    </item>
<item>
        <title>d88db6d7 - AMDGPU: Always use s33 for global scratch wave offset</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll#d88db6d7</link>
        <description>AMDGPU: Always use s33 for global scratch wave offsetEvery called function could possibly need this to calculate theabsolute address of stack objectst, and this avoids inserting a copyaround every call site in the kernel. It&apos;s also somewhat cleaner tokeep this in a callee saved SGPR.llvm-svn: 363990

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll</description>
        <pubDate>Thu, 20 Jun 2019 21:58:24 +0000</pubDate>
        <dc:creator>Matt Arsenault &lt;Matthew.Arsenault@amd.com&gt;</dc:creator>
    </item>
<item>
        <title>913ba8ee - Revert LIS handling in MachineDCE</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll#913ba8ee</link>
        <description>Revert LIS handling in MachineDCEOne of out of tree targets has regressed with this patch. Revertingit for now and let liveness to be fully reconstructed in case passwas used after the LIS is created to resolve the regression.Differential Revision: https://reviews.llvm.org/D60466llvm-svn: 358015

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll</description>
        <pubDate>Tue, 09 Apr 2019 16:13:53 +0000</pubDate>
        <dc:creator>Stanislav Mekhanoshin &lt;Stanislav.Mekhanoshin@amd.com&gt;</dc:creator>
    </item>
<item>
        <title>2ccc120d - [AMDGPU] Regenerate bswap/bitreverse tests.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll#2ccc120d</link>
        <description>[AMDGPU] Regenerate bswap/bitreverse tests.Make codegen changes more obvious in D58017llvm-svn: 354863

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll</description>
        <pubDate>Tue, 26 Feb 2019 11:01:08 +0000</pubDate>
        <dc:creator>Simon Pilgrim &lt;llvm-dev@redking.me.uk&gt;</dc:creator>
    </item>
<item>
        <title>df0f2507 - DAG: Fix not truncating when promoting bswap/bitreverse</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll#df0f2507</link>
        <description>DAG: Fix not truncating when promoting bswap/bitreverseThese need to convert back to the original type, like anyother promotion.llvm-svn: 323932

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll</description>
        <pubDate>Wed, 31 Jan 2018 23:54:16 +0000</pubDate>
        <dc:creator>Matt Arsenault &lt;Matthew.Arsenault@amd.com&gt;</dc:creator>
    </item>
<item>
        <title>982aee6a - [AMDGPU] Switch scalarize global loads ON by default</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll#982aee6a</link>
        <description>[AMDGPU] Switch scalarize global loads ON by defaultDifferential revision: https://reviews.llvm.org/D34407llvm-svn: 307097

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll</description>
        <pubDate>Tue, 04 Jul 2017 17:32:00 +0000</pubDate>
        <dc:creator>Alexander Timofeev &lt;Alexander.Timofeev@amd.com&gt;</dc:creator>
    </item>
<item>
        <title>e4a74137 - Revert r307026, &quot;[AMDGPU] Switch scalarize global loads ON by default&quot;</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll#e4a74137</link>
        <description>Revert r307026, &quot;[AMDGPU] Switch scalarize global loads ON by default&quot;It broke a testcase.  Failing Tests (1):      LLVM :: CodeGen/AMDGPU/alignbit-pat.llllvm-svn: 307054

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll</description>
        <pubDate>Tue, 04 Jul 2017 02:14:18 +0000</pubDate>
        <dc:creator>NAKAMURA Takumi &lt;geek4civic@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>ea7f08be - [AMDGPU] Switch scalarize global loads ON by default</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll#ea7f08be</link>
        <description>[AMDGPU] Switch scalarize global loads ON by defaultDifferential revision: https://reviews.llvm.org/D34407llvm-svn: 307026

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll</description>
        <pubDate>Mon, 03 Jul 2017 14:54:11 +0000</pubDate>
        <dc:creator>Alexander Timofeev &lt;Alexander.Timofeev@amd.com&gt;</dc:creator>
    </item>
<item>
        <title>3dbeefa9 - AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll#3dbeefa9</link>
        <description>AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernelCurrently the default C calling convention functions are treatedthe same as compute kernels. Make this explicit so the defaultcalling convention can be changed to a non-kernel.Converted with perl -pi -e &apos;s/define void/define amdgpu_kernel void/&apos;on the relevant test directories (and undoing in one place that actuallywanted a non-kernel).llvm-svn: 298444

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll</description>
        <pubDate>Tue, 21 Mar 2017 21:39:51 +0000</pubDate>
        <dc:creator>Matt Arsenault &lt;Matthew.Arsenault@amd.com&gt;</dc:creator>
    </item>
<item>
        <title>7aad8fd8 - Enable FeatureFlatForGlobal on Volcanic Islands</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll#7aad8fd8</link>
        <description>Enable FeatureFlatForGlobal on Volcanic IslandsThis switches to the workaround that HSA defaults tofor the mesa path.This should be applied to the 4.0 branch.Patch by Vedran Mileti&#263; &lt;vedran@miletic.net&gt;llvm-svn: 292982

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/bswap.ll</description>
        <pubDate>Tue, 24 Jan 2017 22:02:15 +0000</pubDate>
        <dc:creator>Matt Arsenault &lt;Matthew.Arsenault@amd.com&gt;</dc:creator>
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