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    <title>Changes in select-phi.mir</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>02769f2b - AArch64/GlobalISel: Stop using legal s1 values</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/select-phi.mir#02769f2b</link>
        <description>AArch64/GlobalISel: Stop using legal s1 valuesAs far as I can tell treating s1 values as legal makes no sense. Thereare no allocatable 1-bit registers. SelectionDAG legalizes the usualset of boolean operations to 32-bits, and this should do thesame. This avoids some special case handling in the selector of s1values, and some extra code to look through truncates.This makes some code worse at -O0, since nothing cleans up the and 1the artifact combiner inserts. We could probably add somenon-essential combines or teach the artifact combiner to elideintermediates betweeen boolean uses and defs.

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/select-phi.mir</description>
        <pubDate>Tue, 12 Apr 2022 16:41:16 +0000</pubDate>
        <dc:creator>Matt Arsenault &lt;Matthew.Arsenault@amd.com&gt;</dc:creator>
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        <title>d16945d3 - AArch64/GlobalISel: Add -global-isel-abort=1 to select tests</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/select-phi.mir#d16945d3</link>
        <description>AArch64/GlobalISel: Add -global-isel-abort=1 to select testsOtherwise the legalizer verifier error isn&apos;t triggered since thedefault is fallback.

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/select-phi.mir</description>
        <pubDate>Mon, 11 Apr 2022 20:04:44 +0000</pubDate>
        <dc:creator>Matt Arsenault &lt;Matthew.Arsenault@amd.com&gt;</dc:creator>
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        <title>48904e94 - [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/select-phi.mir#48904e94</link>
        <description>[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsingSummary:This catches malformed mir files which specify alignment as log2 instead of pow2.See https://reviews.llvm.org/D65945 for reference,This is patch is part of a series to introduce an Alignment type.See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.htmlSee this patch for the introduction of the type: https://reviews.llvm.org/D64790Reviewers: courbetSubscribers: MatzeB, qcolombet, dschuff, arsenm, sdardis, nemanjai, jvesely, nhaehnle, hiraditya, kbarton, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, s.egerton, pzheng, llvm-commitsTags: #llvmDifferential Revision: https://reviews.llvm.org/D67433llvm-svn: 371608

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/select-phi.mir</description>
        <pubDate>Wed, 11 Sep 2019 11:16:48 +0000</pubDate>
        <dc:creator>Guillaume Chatelet &lt;gchatelet@google.com&gt;</dc:creator>
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        <title>acc008cb - [globalisel] Remove redundant -global-isel option from tests that use -run-pass. NFC</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/select-phi.mir#acc008cb</link>
        <description>[globalisel] Remove redundant -global-isel option from tests that use -run-pass. NFCAs Roman Tereshin pointed out in https://reviews.llvm.org/D45541, the-global-isel option is redundant when -run-pass is given. -global-isel sets upthe GlobalISel passes in the pass manager but -run-pass skips that entirely andconfigures it&apos;s own pipeline.llvm-svn: 331603

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/select-phi.mir</description>
        <pubDate>Sat, 05 May 2018 21:19:59 +0000</pubDate>
        <dc:creator>Daniel Sanders &lt;daniel_l_sanders@apple.com&gt;</dc:creator>
    </item>
<item>
        <title>43e94b15 - Followup on Proposal to move MIR physical register namespace to &apos;$&apos; sigil.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/select-phi.mir#43e94b15</link>
        <description>Followup on Proposal to move MIR physical register namespace to &apos;$&apos; sigil.Discussed here:http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.htmlIn preparation for adding support for named vregs we are changing the sigil forphysical registers in MIR to &apos;$&apos; from &apos;%&apos;. This will prevent name clashes ofnamed physical register with named vregs.llvm-svn: 323922

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/select-phi.mir</description>
        <pubDate>Wed, 31 Jan 2018 22:04:26 +0000</pubDate>
        <dc:creator>Puyan Lotfi &lt;puyan@puyan.org&gt;</dc:creator>
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<item>
        <title>6c452834 - MIR: Print the register class or bank in vreg defs</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/select-phi.mir#6c452834</link>
        <description>MIR: Print the register class or bank in vreg defsThis updates the MIRPrinter to include the regclass when printingvirtual register defs, which is already valid syntax for theparser. That is, given 64 bit %0 and %1 in a &quot;gpr&quot; regbank,  %1(s64) = COPY %0(s64)would now be written as  %1:gpr(s64) = COPY %0(s64)While this change alone introduces a bit of redundancy with theregisters block, it allows us to update the tests to be more conciseand understandable and brings us closer to being able to remove theregisters block completely.Note: We generally only print the class in defs, but there is oneexception. If there are uses without any defs whatsoever, we&apos;ll printthe class on all uses. I&apos;m not completely convinced this comes up inmeaningful machine IR, but for now the MIRParser and MachineVerifierboth accept that kind of stuff, so we don&apos;t want to have a situationwhere we can print something we can&apos;t parse.llvm-svn: 316479

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/select-phi.mir</description>
        <pubDate>Tue, 24 Oct 2017 18:04:54 +0000</pubDate>
        <dc:creator>Justin Bogner &lt;mail@justinbogner.com&gt;</dc:creator>
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<item>
        <title>4dfd2590 - [GISel][AArch64]: Fix illegal Generic copies in tests</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/select-phi.mir#4dfd2590</link>
        <description>[GISel][AArch64]: Fix illegal Generic copies in testsThis is in preparation for a verifier check that makes sure copies areof the same size (when generic virtual registers are involved).llvm-svn: 316387

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/select-phi.mir</description>
        <pubDate>Mon, 23 Oct 2017 22:53:04 +0000</pubDate>
        <dc:creator>Aditya Nandakumar &lt;aditya_nandakumar@apple.com&gt;</dc:creator>
    </item>
<item>
        <title>1f83777b - [AArch64][GlobalISel] Add a test case for G_PHI of p0 instruction selection.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/select-phi.mir#1f83777b</link>
        <description>[AArch64][GlobalISel] Add a test case for G_PHI of p0 instruction selection.llvm-svn: 315179

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/select-phi.mir</description>
        <pubDate>Sun, 08 Oct 2017 15:29:35 +0000</pubDate>
        <dc:creator>Amara Emerson &lt;aemerson@apple.com&gt;</dc:creator>
    </item>
<item>
        <title>efd8a84c - [GISEl]: Translate phi into G_PHI</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/select-phi.mir#efd8a84c</link>
        <description>[GISEl]: Translate phi into G_PHIG_PHI has the same semantics as PHI but also has types.This lets us verify that the types in the G_PHI are consistent.This also allows specifying legalization actions for G_PHIs.https://reviews.llvm.org/D36990llvm-svn: 311596

            List of files:
            /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/select-phi.mir</description>
        <pubDate>Wed, 23 Aug 2017 20:45:48 +0000</pubDate>
        <dc:creator>Aditya Nandakumar &lt;aditya_nandakumar@apple.com&gt;</dc:creator>
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