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    <title>Changes in matmul.ll</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>80ab16d0 - [NFC][LoopCacheAnalysis] Update test cases to make sure the outputs follow the right order</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/Analysis/LoopCacheAnalysis/PowerPC/matmul.ll#80ab16d0</link>
        <description>[NFC][LoopCacheAnalysis] Update test cases to make sure the outputs follow the right orderIn this patch we change test cases from using &quot;CHECK&quot; to using&quot;CHECK-NEXT&quot;, which is to ensure the order of loops output byloop cache analysis is correct. After D124725 we fixed thenon-deterministic output order hence we did not use &quot;CHECK-DAG&quot;anymore, and now we should really use &quot;CHECK-NEXT&quot; to make surethe loops in the output loop vector follow the right order.Reviewed By: bmahjour, #loopoptwgDifferential Revision: https://reviews.llvm.org/D124984

            List of files:
            /llvm-project-15.0.7/llvm/test/Analysis/LoopCacheAnalysis/PowerPC/matmul.ll</description>
        <pubDate>Thu, 26 May 2022 03:31:17 +0000</pubDate>
        <dc:creator>Congzhe Cao &lt;congzhe.cao@huawei.com&gt;</dc:creator>
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        <title>3d6fe7ac - [LoopCacheAnalysis] Use stable_sort() to avoid non-deterministic print output</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/Analysis/LoopCacheAnalysis/PowerPC/matmul.ll#3d6fe7ac</link>
        <description>[LoopCacheAnalysis] Use stable_sort() to avoid non-deterministic print outputThe print output of loop cache analysis sometimes has a non-deterministic orderand therefore we have been using `CHECK-DAG` in its lit tests. This patch changesthe sorting of LoopCosts to llvm::stable_sort() where we compare loop cost numbersand sort the loops. In case of the same loop cost numbers, llvm::stable_sort() nowwould output a deterministic loop order.Reviewed By: Meinersbur, fhahn, #loopoptwgDifferential Revision: https://reviews.llvm.org/D124725

            List of files:
            /llvm-project-15.0.7/llvm/test/Analysis/LoopCacheAnalysis/PowerPC/matmul.ll</description>
        <pubDate>Mon, 02 May 2022 04:49:11 +0000</pubDate>
        <dc:creator>Congzhe Cao &lt;congzhe.cao@huawei.com&gt;</dc:creator>
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        <title>3caf9af6 - Title: Improve Loop Cache Analysis LIT tests.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/Analysis/LoopCacheAnalysis/PowerPC/matmul.ll#3caf9af6</link>
        <description>Title: Improve Loop Cache Analysis LIT tests.Summary: Make LIT tests unsensitive to analysis output order.Authored By: etiottollvm-svn: 368450

            List of files:
            /llvm-project-15.0.7/llvm/test/Analysis/LoopCacheAnalysis/PowerPC/matmul.ll</description>
        <pubDate>Fri, 09 Aug 2019 16:18:22 +0000</pubDate>
        <dc:creator>Whitney Tsang &lt;whitney.uwaterloo@gmail.com&gt;</dc:creator>
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        <title>dd3b6498 - Title: Loop Cache Analysis</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/test/Analysis/LoopCacheAnalysis/PowerPC/matmul.ll#dd3b6498</link>
        <description>Title: Loop Cache AnalysisSummary: Implement a new analysis to estimate the number of cache linesrequired by a loop nest.The analysis is largely based on the following paper:Compiler Optimizations for Improving Data LocalityBy: Steve Carr, Katherine S. McKinley, Chau-Wen Tsenghttp://www.cs.utexas.edu/users/mckinley/papers/asplos-1994.pdfThe analysis considers temporal reuse (accesses to the same memorylocation) and spatial reuse (accesses to memory locations within a cacheline). For simplicity the analysis considers memory accesses in theinnermost loop in a loop nest, and thus determines the number of cachelines used when the loop L in loop nest LN is placed in the innermostposition.The result of the analysis can be used to drive several transformations.As an example, loop interchange could use it determine which loops in aperfect loop nest should be interchanged to maximize cache reuse.Similarly, loop distribution could be enhanced to take intoconsideration cache reuse between arrays when distributing a loop toeliminate vectorization inhibiting dependencies.The general approach taken to estimate the number of cache lines used bythe memory references in the inner loop of a loop nest is:Partition memory references that exhibit temporal or spatial reuse intoreference groups.For each loop L in the a loop nest LN: a. Compute the cost of thereference group b. Compute the &apos;cache cost&apos; of the loop nest by summingup the reference groups costsFor further details of the algorithm please refer to the paper.Authored By: etiottoReviewers: hfinkel, Meinersbur, jdoerfert, kbarton, bmahjour, anemet,fhahnReviewed By: MeinersburSubscribers: reames, nemanjai, MaskRay, wuzish, Hahnfeld, xusx595,venkataramanan.kumar.llvm, greened, dmgreen, steleman, fhahn, xblvaOO,Whitney, mgorny, hiraditya, mgrang, jsji, llvm-commitsTag: LLVMDifferential Revision: https://reviews.llvm.org/D63459llvm-svn: 368439

            List of files:
            /llvm-project-15.0.7/llvm/test/Analysis/LoopCacheAnalysis/PowerPC/matmul.ll</description>
        <pubDate>Fri, 09 Aug 2019 13:56:29 +0000</pubDate>
        <dc:creator>Whitney Tsang &lt;whitney.uwaterloo@gmail.com&gt;</dc:creator>
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