en Copyright 2015 Java http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp#eecd41aa Revert "Rebase: [Facebook] [MC] Introduce NeverAlign fragment type"This reverts commit 6d0528636ae54fba75938a79ae7a98dfcc949f72. List of files: /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp Mon, 11 Jul 2022 16:48:22 +0000 spupyrev <spupyrev@fb.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp#6d052863 Rebase: [Facebook] [MC] Introduce NeverAlign fragment typeSummary:Introduce NeverAlign fragment type.The intended usage of this fragment is to insert it before a pair ofmacro-op fusion eligible instructions. NeverAlign fragment ensures thatthe next fragment (first instruction in the pair) does not end at agiven alignment boundary by emitting a minimal size nop if necessary.In effect, it ensures that a pair of macro-fusible instructions is notsplit by a given alignment boundary, which is a precondition formacro-op fusion in modern Intel Cores (64B = cache line size, see IntelArchitecture Optimization Reference Manual, 2.3.2.1 Legacy DecodePipeline: Macro-Fusion).This patch introduces functionality used by BOLT when emitting code withMacroFusion alignment already in place.The use case is different from BoundaryAlign and instruction bundling:- BoundaryAlign can be extended to perform the desired alignment for thefirst instruction in the macro-op fusion pair (D101817). However, thisapproach has higher overhead due to reliance on relaxation asBoundaryAlign requires in the general case - seehttps://reviews.llvm.org/D97982#2710638.- Instruction bundling: the intent of NeverAlign fragment is to preventthe first instruction in a pair ending at a given alignment boundary, byinserting at most one minimum size nop. It's OK if either instructioncrosses the cache line. Padding both instructions using bundles to notcross the alignment boundary would result in excessive padding. There'sno straightforward way to request instruction bundling to avoid a givenend alignment for the first instruction in the bundle.LLVM: https://reviews.llvm.org/D97982Manual rebase conflict history:https://phabricator.intern.facebook.com/D30142613Test Plan: sandcastleReviewers: #llvm-boltSubscribers: phabricatorlinterDifferential Revision: https://phabricator.intern.facebook.com/D31361547 List of files: /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp Thu, 05 Aug 2021 21:17:07 +0000 Rafael Auler <rafaelauler@fb.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp#5965878d [X86][NFC] Use mnemonic tables in validateInstruction 4/4Group switch cases by opcode:- VGATHERDPD- VGATHERDPS- VGATHERQPD- VGATHERQPS- VPGATHERDD- VPGATHERDQ- VPGATHERQD- VPGATHERQQDistinguish masked vs non-masked forms by EVEX encoding.Reviewed By: skan, craig.topperDifferential Revision: https://reviews.llvm.org/D127719 List of files: /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp Wed, 15 Jun 2022 02:53:28 +0000 Amir Ayupov <aaupov@fb.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp#6226e46c [X86][NFC] Use mnemonic tables in validateInstruction 3/4Group switch cases by opcode:- V4FMADDPS- V4FMADDSS- V4FNMADDPS- V4FNMADDSS- VP4DPWSSDS- VP4DPWSSDReviewed By: craig.topperDifferential Revision: https://reviews.llvm.org/D127718 List of files: /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp Tue, 14 Jun 2022 19:10:34 +0000 Amir Ayupov <aaupov@fb.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp#df16c077 [X86][NFC] Use mnemonic tables in validateInstruction 2/4Group switch cases by opcode:- VFCMULCPH- VFCMULCSH- VFMULCPH- VFMULCSHReviewed By: craig.topperDifferential Revision: https://reviews.llvm.org/D127717 List of files: /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp Tue, 14 Jun 2022 19:07:11 +0000 Amir Ayupov <aaupov@fb.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp#4bf928bc [X86][NFC] Use mnemonic tables in validateInstruction 1/4Group switch cases by opcode:- VFCMADDCPH- VFCMADDCSH- VFMADDCPH- VFMADDCSHReviewed By: craig.topperDifferential Revision: https://reviews.llvm.org/D127716 List of files: /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp Tue, 14 Jun 2022 18:20:36 +0000 Amir Ayupov <aaupov@fb.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp#92ab024f [X86] Use default member initialization (NFC)Identified with modernize-use-default-member-init. List of files: /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp Mon, 13 Jun 2022 01:30:45 +0000 Kazu Hirata <kazu@google.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp#77e300ff [MC] Change EndOfStatement "unexpected tokens in .xxx directive " to "expected newline" List of files: /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp Sun, 05 Jun 2022 22:11:01 +0000 Fangrui Song <i@maskray.me> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp#9ee15bba [MC] Lower case the first letter of EmitCOFF* EmitWin* EmitCV*. NFC List of files: /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp Thu, 26 May 2022 07:14:08 +0000 Fangrui Song <i@maskray.me> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp#3333c28f [llvm-ml] Improve indirect call parsingIn MASM, if a QWORD symbol is passed to a jmp or call instruction in64-bit mode or a DWORD or WORD symbol is passed in 32-bit mode, thenMSVC's assembler recognizes that as an indirect call. Additionally, ifthe operand is qualified as a ptr, then that should also be an indirectcall.Furthermore, in 64-bit mode, such operands are implicitly rip-relative(in fact, MSVC's assembler ml64.exe does not allow explicitly specifyingrip as a base register.)To keep this patch managable, this patch does not include:* error messages for wrong operand types (e.g. passing a QWORD in 32-bit mode)* resolving indirect calls if the symbol is declared after it's first use (llvm-ml currently only runs a single pass).* imlementing the extern keyword (required to resolve https://crbug.com/762167.)This patch is likely missing a bunch of edge cases, so please do pointthem out in the review.Reviewed By: epastor, hans, MaskRayCommitted By: epastor (on behalf of ayzhao)Differential Revision: https://reviews.llvm.org/D124413 List of files: /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp Thu, 28 Apr 2022 17:01:10 +0000 Alan Zhao <ayzhao@google.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp#95664050 [Inline asm] Fix mangle problem when variable used in inline asm.(Correct 'Mem symbol + IntelExpr' output in PIC model)Reviewed By: skanDifferential Revision: https://reviews.llvm.org/D121785 List of files: /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp Thu, 24 Mar 2022 01:24:15 +0000 Xiang1 Zhang <xiang1.zhang@intel.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp#287dad13 [InlineAsm] Fix mangle problem when global variable used in inline asm(Add modifier P for ARR[BaseReg+IndexReg+..])Reviewed By: skanDifferential Revision: https://reviews.llvm.org/D120887 List of files: /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp Thu, 24 Mar 2022 00:48:35 +0000 Xiang1 Zhang <xiang1.zhang@intel.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp#8a6b644c [Inline asm] Fix mangle problem when variable used in inline asm.(Connect InlineAsm Memory Operand with its real value not just name)Revert 2 history bugfix patch:Revert "[X86][MS-InlineAsm] Make the constraint *m to be simple place holder"This patch revert https://reviews.llvm.org/D115225 which mainlyfix problems intrduced by https://reviews.llvm.org/D113096This reverts commit d7c07f60b35f901f5bd9153b11807124a9bdde60.Revert "Reland "[X86][MS-InlineAsm] Use exact conditions to recognize MS global variables""This patch revert https://reviews.llvm.org/D116090 which fix problemintrduced by https://reviews.llvm.org/D115225This reverts commit 24c68ea1eb4fc0d0e782424ddb02da9e8c53ddf5.Reviewed By: skanDifferential Revision: https://reviews.llvm.org/D120886 List of files: /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp Thu, 24 Mar 2022 00:46:15 +0000 Xiang1 Zhang <xiang1.zhang@intel.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp#6cfe41dc [X86] Rename more target feature related things consistency. NFC-Rename Mode*Bit to Is*Bit to match X86Subtarget.-Rename FeatureLAHFSAHF to FeatureLAFHSAFH64 to match X86Subtarget.-Use consistent capitalizationReviewed By: skanDifferential Revision: https://reviews.llvm.org/D121975 List of files: /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp Fri, 18 Mar 2022 05:11:51 +0000 Craig Topper <craig.topper@sifive.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp#689c3a25 [MC] Fix letter case of some MCSection member functions List of files: /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp Sat, 12 Mar 2022 04:07:00 +0000 Fangrui Song <i@maskray.me> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp#7e570308 [NFC] Fix typosReviewed By: yota9, AmirDifferential Revision: https://reviews.llvm.org/D120859 List of files: /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp Thu, 03 Mar 2022 01:35:49 +0000 Maksim Panchenko <maks@fb.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp#f15014ff Revert "Rename llvm::array_lengthof into llvm::size to match std::size from C++17"This reverts commit ef8206320769ad31422a803a0d6de6077fd231d2.- It conflicts with the existing llvm::size in STLExtras, which will now never be called.- Calling it without llvm:: breaks C++17 compat List of files: /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp Wed, 26 Jan 2022 15:55:53 +0000 Benjamin Kramer <benny.kra@googlemail.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp#ef820632 Rename llvm::array_lengthof into llvm::size to match std::size from C++17As a conquence move llvm::array_lengthof from STLExtras.h toSTLForwardCompat.h (which is included by STLExtras.h so no buildbreakage expected). List of files: /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp Wed, 26 Jan 2022 15:11:12 +0000 serge-sans-paille <sguelton@redhat.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp#2aed0813 [llvm] Use true/false instead of 1/0 (NFC)Identified with modernize-use-bool-literals. List of files: /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp Fri, 07 Jan 2022 08:39:13 +0000 Kazu Hirata <kazu@google.com> http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp#24c68ea1 Reland "[X86][MS-InlineAsm] Use exact conditions to recognize MS global variables"This reverts commit a954558e878ed9e97e99036229e99af8c6b6c881.Thanks Yuanfang's help. I think I found the root cause of the buildbotfail.The failed test has both Memory and Immediate X86Operand. All data ofdifferent operand kinds share the same memory space by a uniondefinition. So it has chance we get the wrong result if we don't checkthe operand kind.It's probably it happen to be the correct value in my local environmentso that I can't reproduce the fail.Differential Revision: https://reviews.llvm.org/D116090 List of files: /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp Fri, 24 Dec 2021 09:12:56 +0000 Phoebe Wang <phoebe.wang@intel.com>