Changes in MipsExpandPseudo.cpp

ad73ce31 - [Target] use getSubtarget<> instead of static_cast<>(getSubtarget())

Thu, 26 May 2022 18:22:41 +0000

[Target] use getSubtarget<> instead of static_cast<>(getSubtarget())Differential Revision: https://reviews.llvm.org/D125391 List of files: /llvm-project-15.0.7/llvm/lib/Target/Mips/MipsExpandPseudo.cpp

59a26448 - [Target] Use range-based for loops (NFC)

Mon, 22 Nov 2021 16:21:07 +0000

[Target] Use range-based for loops (NFC) List of files: /llvm-project-15.0.7/llvm/lib/Target/Mips/MipsExpandPseudo.cpp

bab72dd5 - [NFC][MC] TargetRegisterInfo::getSubReg is a MCRegister.

Thu, 19 Nov 2020 15:43:56 +0000

[NFC][MC] TargetRegisterInfo::getSubReg is a MCRegister.Typing the API appropriately.Differential Revision: https://reviews.llvm.org/D92341 List of files: /llvm-project-15.0.7/llvm/lib/Target/Mips/MipsExpandPseudo.cpp

40c288b7 - [Mips] Fix gcc -Wunused-but-set-variable in -DLLVM_ENABLE_ASSERTIONS=Off builds after D71028

Sat, 14 Dec 2019 00:40:34 +0000

[Mips] Fix gcc -Wunused-but-set-variable in -DLLVM_ENABLE_ASSERTIONS=Off builds after D71028 List of files: /llvm-project-15.0.7/llvm/lib/Target/Mips/MipsExpandPseudo.cpp

d7357c52 - [Mips] Add support for min/max/umin/umax atomics

Thu, 12 Dec 2019 10:19:41 +0000

[Mips] Add support for min/max/umin/umax atomicsIn order to properly implement these atomic we need one register more than otherbinary atomics. It is used for storing result from comparing values in additionto the one that is used for actual result of operation.https://reviews.llvm.org/D71028 List of files: /llvm-project-15.0.7/llvm/lib/Target/Mips/MipsExpandPseudo.cpp

0bd82a96 - [mips] Split long lines in the code. NFC

Sat, 02 Nov 2019 13:33:10 +0000

[mips] Split long lines in the code. NFC List of files: /llvm-project-15.0.7/llvm/lib/Target/Mips/MipsExpandPseudo.cpp

0c476111 - Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM

Thu, 15 Aug 2019 19:22:08 +0000

Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMSummary:This clang-tidy check is looking for unsigned integer variables whose initializerstarts with an implicit cast from llvm::Register and changes the type of thevariable to llvm::Register (dropping the llvm:: where possible).Partial reverts in:X86FrameLowering.cpp - Some functions return unsigned and arguably should be MCRegisterX86FixupLEAs.cpp - Some functions return unsigned and arguably should be MCRegisterX86FrameLowering.cpp - Some functions return unsigned and arguably should be MCRegisterHexagonBitSimplify.cpp - Function takes BitTracker::RegisterRef which appears to be unsigned&MachineVerifier.cpp - Ambiguous operator==() given MCRegister and const RegisterPPCFastISel.cpp - No Register::operator-=()PeepholeOptimizer.cpp - TargetInstrInfo::optimizeLoadInstr() takes an unsigned&MachineTraceMetrics.cpp - MachineTraceMetrics lacks a suitable constructorManual fixups in:ARMFastISel.cpp - ARMEmitLoad() now takes a Register& instead of unsigned&HexagonSplitDouble.cpp - Ternary operator was ambiguous between unsigned/RegisterHexagonConstExtenders.cpp - Has a local class named Register, used llvm::Register instead of Register.PPCFastISel.cpp - PPCEmitLoad() now takes a Register& instead of unsigned&Depends on D65919Reviewers: arsenm, bogner, craig.topper, RKSimonReviewed By: arsenmSubscribers: RKSimon, craig.topper, lenary, aemerson, wuzish, jholewinski, MatzeB, qcolombet, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, wdng, nhaehnle, sbc100, jgravelle-google, kristof.beyls, hiraditya, aheejin, kbarton, fedor.sergeev, javed.absar, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, tpr, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, Jim, s.egerton, llvm-commitsTags: #llvmDifferential Revision: https://reviews.llvm.org/D65962llvm-svn: 369041 List of files: /llvm-project-15.0.7/llvm/lib/Target/Mips/MipsExpandPseudo.cpp

2946cd70 - Update the file headers across all of the LLVM projects in the monorepo

Sat, 19 Jan 2019 08:50:56 +0000

Update the file headers across all of the LLVM projects in the monorepoto reflect the new license.We understand that people may be surprised that we're moving the headerentirely to discuss the new license. We checked this carefully with theFoundation's lawyer and we believe this is the correct approach.Essentially, all code in the project is now made available by the LLVMproject under our new license, so you will see that the license headersinclude that license only. Some of our contributors have contributedcode under our old license, and accordingly, we have retained a copy ofour old license notice in the top-level files in each project andrepository.llvm-svn: 351636 List of files: /llvm-project-15.0.7/llvm/lib/Target/Mips/MipsExpandPseudo.cpp

3239ba8c - [mips] Fix atomic operations at O0, v3

Thu, 05 Jul 2018 09:27:05 +0000

[mips] Fix atomic operations at O0, v3Similar to PR/25526, fast-regalloc introduces spills at the end of basicblocks. When this occurs in between an ll and sc, the stores can cause theatomic sequence to fail.This patch fixes the issue by introducing more pseudos to represent atomicoperations and moving their lowering to after the expansion of postRApseudos.This version addresses issues with the initial implementation and coversall atomic operations.This resolves PR/32020.Thanks to James Cowgill for reporting the issue!Patch By: Simon DardisDifferential Revision: https://reviews.llvm.org/D31287llvm-svn: 336328 List of files: /llvm-project-15.0.7/llvm/lib/Target/Mips/MipsExpandPseudo.cpp

ae6f2bcb - Recommit "[mips] Fix atomic compare and swap at O0."

Fri, 24 Feb 2017 16:32:18 +0000

Recommit "[mips] Fix atomic compare and swap at O0."This time with the missing files.Similar to PR/25526, fast-regalloc introduces spills at the end of basicblocks. When this occurs in between an ll and sc, the store can cause theatomic sequence to fail.This patch fixes the issue by introducing more pseudos to represent atomicoperations and moving their lowering to after the expansion of postRApseudos.This resolves PR/32020.Thanks to James Cowgill for reporting the issue!Reviewers: slthakurDifferential Revision: https://reviews.llvm.org/D30257llvm-svn: 296134 List of files: /llvm-project-15.0.7/llvm/lib/Target/Mips/MipsExpandPseudo.cpp

4d9b017e - Remove pseudo instructions that are no longer used.

Fri, 25 May 2012 20:37:40 +0000

Remove pseudo instructions that are no longer used.llvm-svn: 157492 List of files: /llvm-project-15.0.7/llvm/lib/Target/Mips/MipsExpandPseudo.cpp

4b02a29e - Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce static data size.

Mon, 05 Mar 2012 05:37:41 +0000

Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce static data size.llvm-svn: 152016 List of files: /llvm-project-15.0.7/llvm/lib/Target/Mips/MipsExpandPseudo.cpp

f54f60f3 - remove blanks, and some code format

Tue, 28 Feb 2012 07:46:26 +0000

remove blanks, and some code formatllvm-svn: 151625 List of files: /llvm-project-15.0.7/llvm/lib/Target/Mips/MipsExpandPseudo.cpp

b049aef2 - Add an option to use a virtual register as the global base register instead of

Fri, 24 Feb 2012 22:34:47 +0000

Add an option to use a virtual register as the global base register instead ofreserving a physical register ($gp or $28) for that purpose.This will completely eliminate loads that restore the value of $gp after everyfunction call, if the register allocator assigns a callee-saved register, oreliminate unnecessary loads if it assigns a temporary register. example:.cpload $25 // set $gp.....cprestore 16 // store $gp to stack slot 16($sp)....jalr $25 // function call. clobbers $gp.lw $gp, 16($sp) // not emitted if callee-saved reg is chosen....lw $2, 4($gp)...jalr $25 // function call.lw $gp, 16($sp) // not emitted if $gp is not live after this instruction....llvm-svn: 151402 List of files: /llvm-project-15.0.7/llvm/lib/Target/Mips/MipsExpandPseudo.cpp

9f610119 - remove Emacs-tag form .cpp files in Mips Backend, and fix some typo.

Fri, 17 Feb 2012 08:55:11 +0000

remove Emacs-tag form .cpp files in Mips Backend, and fix some typo.llvm-svn: 150805 List of files: /llvm-project-15.0.7/llvm/lib/Target/Mips/MipsExpandPseudo.cpp

dd6c1cd4 - add Emacs tag and fix some comment error in file headers

Fri, 17 Feb 2012 01:23:50 +0000

add Emacs tag and fix some comment error in file headersllvm-svn: 150775 List of files: /llvm-project-15.0.7/llvm/lib/Target/Mips/MipsExpandPseudo.cpp

6cc775f9 - - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and

Tue, 28 Jun 2011 19:10:37 +0000

- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andsink them into MC layer.- Added MCInstrInfo, which captures the tablegen generated static data. ChangTargetInstrInfo so it's based off MCInstrInfo.llvm-svn: 134021 List of files: /llvm-project-15.0.7/llvm/lib/Target/Mips/MipsExpandPseudo.cpp

e2489125 - Reverse unnecessary changes made in r129606 and r129608. There is no change in functionality.

Fri, 15 Apr 2011 21:51:11 +0000

Reverse unnecessary changes made in r129606 and r129608. There is no change in functionality.llvm-svn: 129612 List of files: /llvm-project-15.0.7/llvm/lib/Target/Mips/MipsExpandPseudo.cpp

aef55c88 - Fix lines that have incorrect indentation or exceed 80 columns. There is no change in functionality.

Fri, 15 Apr 2011 21:00:26 +0000

Fix lines that have incorrect indentation or exceed 80 columns. There is no change in functionality.llvm-svn: 129606 List of files: /llvm-project-15.0.7/llvm/lib/Target/Mips/MipsExpandPseudo.cpp

27916977 - Add pass that expands pseudo instructions into target instructions after register allocation. Define pseudos that get expanded into mtc1 or mfc1 instructions.

Fri, 15 Apr 2011 19:52:08 +0000

Add pass that expands pseudo instructions into target instructions after register allocation. Define pseudos that get expanded into mtc1 or mfc1 instructions.llvm-svn: 129594 List of files: /llvm-project-15.0.7/llvm/lib/Target/Mips/MipsExpandPseudo.cpp