Changes in SVEIntrinsicOpts.cpp

a83aa33d - [IR] Move vector.insert/vector.extract out of experimental namespace

Thu, 16 Jun 2022 14:45:28 +0000

[IR] Move vector.insert/vector.extract out of experimental namespaceThese intrinsics are now fundemental for SVE code generation and have beenpresent for a year and a half, hence move them out of the experimentalnamespace.Differential Revision: https://reviews.llvm.org/D127976 List of files: /llvm-project-15.0.7/llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp

f1d56295 - [Aarch64] Remove redundant declaration initializeSVEIntrinsicOptsPass (NFC)

Sat, 01 Jan 2022 17:14:25 +0000

[Aarch64] Remove redundant declaration initializeSVEIntrinsicOptsPass (NFC)The function is declared in AArch64.h.Identified with readability-redundant-declaration. List of files: /llvm-project-15.0.7/llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp

2b7be47b - [llvm] Strip redundant lambda (NFC)

Fri, 17 Dec 2021 18:51:39 +0000

[llvm] Strip redundant lambda (NFC) List of files: /llvm-project-15.0.7/llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp

0395e015 - [IR] Split vscale_range interface

Tue, 07 Dec 2021 09:53:16 +0000

[IR] Split vscale_range interfaceInterface is split from: std::pair getVScaleRangeArgs()into separate functions for min/max: unsigned getVScaleRangeMin(); Optional getVScaleRangeMax();Reviewed By: sdesmalen, paulwalker-armDifferential Revision: https://reviews.llvm.org/D114075 List of files: /llvm-project-15.0.7/llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp

c874dd53 - [llvm][clang][NFC] updates inline licence info

Thu, 05 Aug 2021 03:16:17 +0000

[llvm][clang][NFC] updates inline licence infoSome files still contained the old University of Illinois Open SourceLicence header. This patch replaces that with the Apache 2 with LLVMException licence.Differential Revision: https://reviews.llvm.org/D107528 List of files: /llvm-project-15.0.7/llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp

d9cc5d84 - [AArch64][SVE] Combine bitcasts of predicate types with vector inserts/extracts of loads/stores

Thu, 22 Jul 2021 12:30:45 +0000

[AArch64][SVE] Combine bitcasts of predicate types with vector inserts/extracts of loads/storesAn insert subvector that is inserting the result of a vector predicatesized load into undef at index 0, whose result is casted to a predicatetype, can be combined into a direct predicate load. Likewise the sameapplies to extract subvector but in reverse.The purpose of this optimization is to clean up cases that will beintroduced in a later patch where casts to/from predicate types from i8types will use insert subvector, rather than going through memory early.This optimization is done in SVEIntrinsicOpts rather than InstCombine tore-introduce scalable loads as late as possible, to give otheroptimizations the best chance possible to do a good job.Differential Revision: https://reviews.llvm.org/D106549 List of files: /llvm-project-15.0.7/llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp

191f9fa5 - [AArch64][SVE] Move instcombine like transforms out of SVEIntrinsicOpts

Tue, 13 Jul 2021 14:42:36 +0000

[AArch64][SVE] Move instcombine like transforms out of SVEIntrinsicOptsInstead move them to the instcombine that happens in AArch64TargetTransformInfo.Differential Revision: https://reviews.llvm.org/D106144 List of files: /llvm-project-15.0.7/llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp

306370be - [AArch64] Fix namespace issue. NFC

Thu, 06 May 2021 18:16:07 +0000

[AArch64] Fix namespace issue. NFC List of files: /llvm-project-15.0.7/llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp

62e9c760 - [AArch64][SVE] Remove unused function missed from D101302

Fri, 23 Apr 2021 15:34:26 +0000

[AArch64][SVE] Remove unused function missed from D101302The functionality in SVEIntrinsicOpts::isReinterpretToSVBool was moved inD101302, however the original now unused function was not removed (NFC).Differential Revision: https://reviews.llvm.org/D101642 List of files: /llvm-project-15.0.7/llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp

c8f20ed4 - [AArch64][SVE] Move convert.{from,to}.svbool optimization into InstCombine

Mon, 26 Apr 2021 15:19:25 +0000

[AArch64][SVE] Move convert.{from,to}.svbool optimization into InstCombineAs part of this the ptrue coalescing done in SVEIntrinsicOpts has beenmodified to not introduce redundant converts, since the convert removalwill no longer run after that optimisation to clean up.Differential Revision: https://reviews.llvm.org/D101302 List of files: /llvm-project-15.0.7/llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp

b0db2dbc - [AArch64][SVEIntrinsicOpts] Optimize tbl+dup into dup+extractelement

Fri, 26 Mar 2021 07:55:46 +0000

[AArch64][SVEIntrinsicOpts] Optimize tbl+dup into dup+extractelementDifferential Revision: https://reviews.llvm.org/D99412 List of files: /llvm-project-15.0.7/llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp

14bd44ed - [AArch64][SVEIntrinsicOpts] Factor out redundant SVE mul/fmul intrinsics

Mon, 08 Mar 2021 12:52:40 +0000

[AArch64][SVEIntrinsicOpts] Factor out redundant SVE mul/fmul intrinsicsThis commit implements an IR-level optimization to eliminate idempotentSVE mul/fmul intrinsic calls. Currently, the following patterns arecaptured: fmul pg (dup_x 1.0) V => V mul pg (dup_x 1) V => V fmul pg V (dup_x 1.0) => V mul pg V (dup_x 1) => V fmul pg V (dup v pg 1.0) => V mul pg V (dup v pg 1) => VThe result of this commit is that code such as: 1 #include 2 3 svfloat64_t foo(svfloat64_t a) { 4 svbool_t t = svptrue_b64(); 5 svfloat64_t b = svdup_f64(1.0); 6 return svmul_m(t, a, b); 7 }will lower to a nop.This commit does not capture all possibilities; only the simple casesdescribed above. There is still room for further optimisation.Differential Revision: https://reviews.llvm.org/D98033 List of files: /llvm-project-15.0.7/llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp

3d257fde - [AArch64][SVE] Coalesce ptrue instrinsic calls where possible

Fri, 05 Feb 2021 10:43:06 +0000

[AArch64][SVE] Coalesce ptrue instrinsic calls where possibleIt is possible to eliminate redundant calls to the SVE ptrue intrinsic.For example: suppose that we have two SVE ptrue intrinsic calls P1 andP2. If P1 is at least as wide as P2, then P2 can be written as areinterpret P1 using the SVE reinterpret intrinsics.Coalescing ptrue intrinsics can result in fewer ptrue instructions inthe codegen, and is conducive to better analysis further down the line.This commit extends the aarch64-sve-intrinsic-opts pass to supportcoalescing ptrue intrisic calls.Reviewed By: david-armDifferential Revision: https://reviews.llvm.org/D94230 List of files: /llvm-project-15.0.7/llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp

3122c66a - [AArch64][SVE] Remove chains of unnecessary SVE reinterpret intrinsics

Mon, 11 Jan 2021 13:46:01 +0000

[AArch64][SVE] Remove chains of unnecessary SVE reinterpret intrinsicsThis commit extends SVEIntrinsicOpts::optimizeConvertFromSVBool toidentify and remove longer chains of redundant SVE reintepretintrinsics. For example, the following chain of redundant SVEreinterprets is now recognised as redundant: %a = %1 = @llvm.aarch64.sve.convert.to.svbool( %a) %2 = @llvm.aarch64.sve.convert.from.svbool( %1) %3 = @llvm.aarch64.sve.convert.to.svbool( %2) %4 = @llvm.aarch64.sve.convert.from.svbool( %3) %5 = @llvm.aarch64.sve.convert.to.svbool( %4) %6 = @llvm.aarch64.sve.convert.from.svbool( %5) ret %6and will be replaced with: ret %aEliminating these can sometimes mean emitting fewer unnecessaryloads/stores when lowering to assembly.Differential Revision: https://reviews.llvm.org/D94074 List of files: /llvm-project-15.0.7/llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp

037b058e - [AArch64] SVEIntrinsicOpts - use range loop and cast<> instead of dyn_cast<> for dereferenced pointer. NFCI.

Thu, 07 Jan 2021 14:21:29 +0000

[AArch64] SVEIntrinsicOpts - use range loop and cast<> instead of dyn_cast<> for dereferenced pointer. NFCI.Don't directly dereference a dyn_cast<> - use cast<> so we assert for the correct type.Also, simplify the for loop to a range loop.Fixes clang static analyzer warning. List of files: /llvm-project-15.0.7/llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp

6c7957c9 - [SVE] Fix bug in SVEIntrinsicOpts::optimizePTest

Thu, 13 Aug 2020 09:44:12 +0000

[SVE] Fix bug in SVEIntrinsicOpts::optimizePTestThe code wasn't taking into account that the two operandspassed to ptest could be identical and was trying to erasethem twice.Differential Revision: https://reviews.llvm.org/D85892 List of files: /llvm-project-15.0.7/llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp

2a672767 - Prefix some AArch64/ARM passes with "aarch64-"/"arm-"

Mon, 27 Jul 2020 17:49:16 +0000

Prefix some AArch64/ARM passes with "aarch64-"/"arm-" For consistency with other target specific passes.Reviewed By: arsenmDifferential Revision: https://reviews.llvm.org/D84560 List of files: /llvm-project-15.0.7/llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp

3d9b5370 - [SVEIntrinsicOpts] NFC: Remove unused isReinterpretFromBool for no-assert builds

Mon, 20 Apr 2020 20:24:38 +0000

[SVEIntrinsicOpts] NFC: Remove unused isReinterpretFromBool for no-assert buildsisReinterpretFromBool's only use is in an assert, which causes a warning that thefunction is defined but not used in no-assert builds. List of files: /llvm-project-15.0.7/llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp

36c76de6 - [AArch64][SVE] Add a pass for SVE intrinsic optimisations

Tue, 14 Apr 2020 08:52:04 +0000

[AArch64][SVE] Add a pass for SVE intrinsic optimisationsSummary:Creates the SVEIntrinsicOpts pass. In this patch, the pass triesto remove unnecessary reinterpret intrinsics which convert toand from svbool_t (llvm.aarch64.sve.convert.[to|from].svbool)For example, the reinterprets below are redundant: %1 = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %a) %2 = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %1)The pass also looks for ptest intrinsics and phi instructions wherethe operands are being needlessly converted to and from svbool_t.Reviewers: sdesmalen, andwar, efriedma, cameron.mcinally, c-rhodes, rengolinReviewed By: efriedmaSubscribers: mgorny, tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, danielkiss, cfe-commits, llvm-commitsTags: #llvmDifferential Revision: https://reviews.llvm.org/D76078 List of files: /llvm-project-15.0.7/llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp