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    <title>Changes in Scheduler.cpp</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>1d0bc055 - [llvm] Use llvm::append_range (NFC)</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp#1d0bc055</link>
        <description>[llvm] Use llvm::append_range (NFC)

            List of files:
            /llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp</description>
        <pubDate>Thu, 07 Jan 2021 02:27:33 +0000</pubDate>
        <dc:creator>Kazu Hirata &lt;kazu@google.com&gt;</dc:creator>
    </item>
<item>
        <title>0eaee545 - [llvm] Migrate llvm::make_unique to std::make_unique</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp#0eaee545</link>
        <description>[llvm] Migrate llvm::make_unique to std::make_uniqueNow that we&apos;ve moved to C++14, we no longer need the llvm::make_uniqueimplementation from STLExtras.h. This patch is a mechanical replacementof (hopefully) all the llvm::make_unique instances across the monorepo.llvm-svn: 369013

            List of files:
            /llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp</description>
        <pubDate>Thu, 15 Aug 2019 15:54:37 +0000</pubDate>
        <dc:creator>Jonas Devlieghere &lt;jonas@devlieghere.com&gt;</dc:creator>
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<item>
        <title>3de2f033 - [MCA] Slightly refactor class RetireControlUnit, and add the ability to override the mask of used buffered resources in class mca::Instruction. NFCI</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp#3de2f033</link>
        <description>[MCA] Slightly refactor class RetireControlUnit, and add the ability to override the mask of used buffered resources in class mca::Instruction. NFCIThis patch teaches the RCU how to peek &apos;next&apos; RCUTokens. A new method has beenadded to the RetireControlUnit class with the goal of minimizing the complexityof follow-up patches that will enable macro-fusion support in mca.This patch also adds method Instruction::getNumMicroOpcodes() to simplify commoninteractions with the instruction descriptor (a pattern quite common in somepipeline stages).Added the ability to override the default set of consumed scheduler resources(this -again- is to simplify future patches that add support for macro-op fusion).No functional change intended.llvm-svn: 369010

            List of files:
            /llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp</description>
        <pubDate>Thu, 15 Aug 2019 15:27:40 +0000</pubDate>
        <dc:creator>Andrea Di Biagio &lt;Andrea_DiBiagio@sn.scee.net&gt;</dc:creator>
    </item>
<item>
        <title>7aa0dbb6 - [MCA] Slightly refactor the logic in ResourceManager. NFCI</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp#7aa0dbb6</link>
        <description>[MCA] Slightly refactor the logic in ResourceManager. NFCIThis patch slightly changes the API in the attempt to simplify resource bufferqueries. It is done in preparation for a patch that will enable support formacro fusion.llvm-svn: 368994

            List of files:
            /llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp</description>
        <pubDate>Thu, 15 Aug 2019 12:39:55 +0000</pubDate>
        <dc:creator>Andrea Di Biagio &lt;Andrea_DiBiagio@sn.scee.net&gt;</dc:creator>
    </item>
<item>
        <title>47db08db - [MCA] Further refactor the bottleneck analysis view. NFCI.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp#47db08db</link>
        <description>[MCA] Further refactor the bottleneck analysis view. NFCI.llvm-svn: 362933

            List of files:
            /llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp</description>
        <pubDate>Mon, 10 Jun 2019 12:50:08 +0000</pubDate>
        <dc:creator>Andrea Di Biagio &lt;Andrea_DiBiagio@sn.scee.net&gt;</dc:creator>
    </item>
<item>
        <title>6a989c35 - [MCA][Scheduler] Change how memory instructions are dispatched to the pending set. NFCI</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp#6a989c35</link>
        <description>[MCA][Scheduler] Change how memory instructions are dispatched to the pending set. NFCIllvm-svn: 362302

            List of files:
            /llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp</description>
        <pubDate>Sat, 01 Jun 2019 15:22:37 +0000</pubDate>
        <dc:creator>Andrea Di Biagio &lt;Andrea_DiBiagio@sn.scee.net&gt;</dc:creator>
    </item>
<item>
        <title>280ac1fd - [MCA] Refactor class LSUnit. NFCI</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp#280ac1fd</link>
        <description>[MCA] Refactor class LSUnit. NFCIThis should be the last bit of refactoring in preparation for a patch that wouldfinally fix PR37494.This patch introduces the concept of memory dependency groups (classMemoryGroup) and &quot;Load/Store Unit token&quot; (LSUToken) to track the status of amemory operation.A MemoryGroup is a node of a memory dependency graph. It is used internally toclassify memory operations based on the memory operations they depend on.  Let Iand J be two memory operations, we say that I and J equivalent (for the purposeof mapping instructions to memory dependency groups) if the set of memoryoperations they depend depend on is identical.MemoryGroups are identified by so-called LSUToken (a unique group identifierassigned by the LSUnit to every group). When an instruction I is dispatched tothe LSUnit, the LSUnit maps I to a group, and then returns a LSUToken.LSUTokens are used by class Scheduler to track memory dependencies.This patch simplifies the LSUnit interface and moves most of the implementationdetails to its base class (LSUnitBase). There is no user visible change to theoutput.llvm-svn: 361950

            List of files:
            /llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp</description>
        <pubDate>Wed, 29 May 2019 11:38:27 +0000</pubDate>
        <dc:creator>Andrea Di Biagio &lt;Andrea_DiBiagio@sn.scee.net&gt;</dc:creator>
    </item>
<item>
        <title>c2493ce4 - [MCA][Scheduler] Improved critical memory dependency computation.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp#c2493ce4</link>
        <description>[MCA][Scheduler] Improved critical memory dependency computation.This fixes a problem where back-pressure increases caused by registerdependencies were not correctly notified if execution was also delayed by memorydependencies.llvm-svn: 361740

            List of files:
            /llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp</description>
        <pubDate>Sun, 26 May 2019 19:50:31 +0000</pubDate>
        <dc:creator>Andrea Di Biagio &lt;Andrea_DiBiagio@sn.scee.net&gt;</dc:creator>
    </item>
<item>
        <title>a549dd25 - [MCA] Refactor the logic that computes the critical memory dependency info. NFCI</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp#a549dd25</link>
        <description>[MCA] Refactor the logic that computes the critical memory dependency info. NFCICriticalRegDep has been renamed CriticalDependency, and it is now used by classInstruction to store information about the critical register dependency and thecritical memory dependency. No functional change intendend.llvm-svn: 361737

            List of files:
            /llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp</description>
        <pubDate>Sun, 26 May 2019 18:41:35 +0000</pubDate>
        <dc:creator>Andrea Di Biagio &lt;Andrea_DiBiagio@sn.scee.net&gt;</dc:creator>
    </item>
<item>
        <title>dd0d9e01 - [MCA] Introduce class LSUnitBase and let LSUnit derive from it.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp#dd0d9e01</link>
        <description>[MCA] Introduce class LSUnitBase and let LSUnit derive from it.Class LSUnitBase provides a abstract interface for all the concrete LS units inllvm-mca.Methods exposed by the public abstract LSUnitBase interface are: - Status isAvailable(const InstRef&amp;); - void dispatch(const InstRef &amp;); - const InstRef &amp;isReady(const InstRef &amp;);LSUnitBase standardises the API, but not the data structures internally used byLS units. This allows for more flexibility.Previously, only method `isReady()` was declared virtual by class LSUnit.Also, derived classes had to inherit all the internal data members of LSUnit.No functional change intended.llvm-svn: 361496

            List of files:
            /llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp</description>
        <pubDate>Thu, 23 May 2019 13:42:47 +0000</pubDate>
        <dc:creator>Andrea Di Biagio &lt;Andrea_DiBiagio@sn.scee.net&gt;</dc:creator>
    </item>
<item>
        <title>0460a362 - [MCA] Notify event listeners when instructions transition to the Pending state. NFCI</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp#0460a362</link>
        <description>[MCA] Notify event listeners when instructions transition to the Pending state. NFCIllvm-svn: 359983

            List of files:
            /llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp</description>
        <pubDate>Sun, 05 May 2019 16:07:27 +0000</pubDate>
        <dc:creator>Andrea Di Biagio &lt;Andrea_DiBiagio@sn.scee.net&gt;</dc:creator>
    </item>
<item>
        <title>be3281a2 - [MCA] Highlight kernel bottlenecks in the summary view.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp#be3281a2</link>
        <description>[MCA] Highlight kernel bottlenecks in the summary view.This patch adds a new flag named -bottleneck-analysis to print out informationabout throughput bottlenecks.MCA knows how to identify and classify dynamic dispatch stalls. However, itdoesn&apos;t know how to analyze and highlight kernel bottlenecks.  The goal of thispatch is to teach MCA how to correlate increases in backend pressure to backendstalls (and therefore, the loss of throughput).From a Scheduler point of view, backend pressure is a function of the schedulerbuffer usage (i.e. how the number of uOps in the scheduler buffers changes overtime). Backend pressure increases (or decreases) when there is a mismatchbetween the number of opcodes dispatched, and the number of opcodes issued inthe same cycle.  Since buffer resources are limited, continuous increases inbackend pressure would eventually leads to dispatch stalls. So, there is astrong correlation between dispatch stalls, and how backpressure changed overtime.This patch teaches how to identify situations where backend pressure increasesdue to: - unavailable pipeline resources. - data dependencies.Data dependencies may delay execution of instructions and therefore increase thetime that uOps have to spend in the scheduler buffers. That often translates toan increase in backend pressure which may eventually lead to a bottleneck.Contention on pipeline resources may also delay execution of instructions, andlead to a temporary increase in backend pressure.Internally, the Scheduler classifies instructions based on whether register /memory operands are available or not.An instruction is marked as &quot;ready to execute&quot; only if data dependencies arefully resolved.Every cycle, the Scheduler attempts to execute all instructions that are readyto execute. If an instruction cannot execute because of unavailable pipelineresources, then the Scheduler internally updates a BusyResourceUnits mask withthe ID of each unavailable resource.ExecuteStage is responsible for tracking changes in backend pressure. If backendpressure increases during a cycle because of contention on pipeline resources,then ExecuteStage sends a &quot;backend pressure&quot; event to the listeners.That event would contain information about instructions delayed by resourcepressure, as well as the BusyResourceUnits mask.Note that ExecuteStage also knows how to identify situations where backpressureincreased because of delays introduced by data dependencies.The SummaryView observes &quot;backend pressure&quot; events and prints out a &quot;bottleneckreport&quot;.Example of bottleneck report:```Cycles with backend pressure increase [ 99.89% ]Throughput Bottlenecks:  Resource Pressure       [ 0.00% ]  Data Dependencies:      [ 99.89% ]   - Register Dependencies [ 0.00% ]   - Memory Dependencies   [ 99.89% ]```A bottleneck report is printed out only if increases in backend pressureeventually caused backend stalls.About the time complexity:Time complexity is linear in the number of instructions in theScheduler::PendingSet.The average slowdown tends to be in the range of ~5-6%.For memory intensive kernels, the slowdown can be significant if flag-noalias=false is specified. In the worst case scenario I have observed aslowdown of ~30% when flag -noalias=false was specified.We can definitely recover part of that slowdown if we optimize class LSUnit (bydoing extra bookkeeping to speedup queries). For now, this new analysis isdisabled by default, and it can be enabled via flag -bottleneck-analysis. Usersof MCA as a library can enable the generation of pressure events through theconstructor of ExecuteStage.This patch partially addresses https://bugs.llvm.org/show_bug.cgi?id=37494Differential Revision: https://reviews.llvm.org/D58728llvm-svn: 355308

            List of files:
            /llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp</description>
        <pubDate>Mon, 04 Mar 2019 11:52:34 +0000</pubDate>
        <dc:creator>Andrea Di Biagio &lt;Andrea_DiBiagio@sn.scee.net&gt;</dc:creator>
    </item>
<item>
        <title>c032e2ab - [MCA] Always check if scheduler resources are unavailable when reporting dispatch stalls.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp#c032e2ab</link>
        <description>[MCA] Always check if scheduler resources are unavailable when reporting dispatch stalls.Dispatch stall cycles may be associated to multiple dispatch stall events.Before this patch, each stall cycle was associated with a single stall event.This patch also improves a couple of code comments, and adds a helper method toquery the Scheduler for dispatch stalls.llvm-svn: 354877

            List of files:
            /llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp</description>
        <pubDate>Tue, 26 Feb 2019 14:19:00 +0000</pubDate>
        <dc:creator>Andrea Di Biagio &lt;Andrea_DiBiagio@sn.scee.net&gt;</dc:creator>
    </item>
<item>
        <title>3316eb5b - [MCA][Scheduler] Collect resource pressure and memory dependency bottlenecks.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp#3316eb5b</link>
        <description>[MCA][Scheduler] Collect resource pressure and memory dependency bottlenecks.Every cycle, the Scheduler checks if instructions in the ReadySet can be issuedto the underlying pipelines. If an instruction cannot be issued because one ormore pipeline resources are unavailable, then fieldInstruction::CriticalResourceMask is updated with the resource identifier of theunavailable resources.If an instruction cannot be promoted from the PendingSet to the ReadySet becauseof a memory dependency, then field Instruction::CriticalMemDep is updated withthe identifier of the dependending memory instruction.Bottleneck information is collected after every cycle for instructions that arewaiting to execute. The idea is to help identify causes of bottlenecks; thisinformation can be used in future to implement a bottleneck analysis.llvm-svn: 354490

            List of files:
            /llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp</description>
        <pubDate>Wed, 20 Feb 2019 18:01:49 +0000</pubDate>
        <dc:creator>Andrea Di Biagio &lt;Andrea_DiBiagio@sn.scee.net&gt;</dc:creator>
    </item>
<item>
        <title>7a950ed5 - [MCA] Slightly refactor method writeStartEvent in WriteState and ReadState. NFCI</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp#7a950ed5</link>
        <description>[MCA] Slightly refactor method writeStartEvent in WriteState and ReadState. NFCIThis is another change in preparation for PR37494.No functional change intended.llvm-svn: 354261

            List of files:
            /llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp</description>
        <pubDate>Mon, 18 Feb 2019 11:27:11 +0000</pubDate>
        <dc:creator>Andrea Di Biagio &lt;Andrea_DiBiagio@sn.scee.net&gt;</dc:creator>
    </item>
<item>
        <title>5ad52e35 - [MCA][LSUnit] Return the ID of the dependent memory operation from method</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp#5ad52e35</link>
        <description>[MCA][LSUnit] Return the ID of the dependent memory operation from methodisReady(). NFCIThis is yet another change in preparation for a fix for PR37494.llvm-svn: 354150

            List of files:
            /llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp</description>
        <pubDate>Fri, 15 Feb 2019 18:05:59 +0000</pubDate>
        <dc:creator>Andrea Di Biagio &lt;Andrea_DiBiagio@sn.scee.net&gt;</dc:creator>
    </item>
<item>
        <title>318f990a - [MCA][Scheduler] Use latency information to further classify busy instructions.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp#318f990a</link>
        <description>[MCA][Scheduler] Use latency information to further classify busy instructions.This patch introduces a new instruction stage named &apos;IS_PENDING&apos;.An instruction transitions from the IS_DISPATCHED to the IS_PENDING stage ifinput registers are not available, but their latency is known.This patch also adds a new set of instructions named &apos;PendingSet&apos; to classScheduler. The idea is that the PendingSet will only contain instructions thathave reached the IS_PENDING stage.By construction, an instruction in the PendingSet is only dependent oninstructions that have already reached the execution stage. The plan is to usethis knowledge to identify bottlenecks caused by data dependencies (seePR37494).Differential Revision: https://reviews.llvm.org/D58066llvm-svn: 353937

            List of files:
            /llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp</description>
        <pubDate>Wed, 13 Feb 2019 11:02:42 +0000</pubDate>
        <dc:creator>Andrea Di Biagio &lt;Andrea_DiBiagio@sn.scee.net&gt;</dc:creator>
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<item>
        <title>23ff2aa4 - [MCA][Scheduler] Track resources that were found busy when issuing an instruction.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp#23ff2aa4</link>
        <description>[MCA][Scheduler] Track resources that were found busy when issuing an instruction.This is a follow up of r353706. When the scheduler fails to issue a readyinstruction to the underlying pipelines, it now updates a mask of &apos;busy resourceunits&apos;. That information will be used in future to obtain the set of&quot;problematic&quot; resources in the case of bottlenecks caused by resource pressure.No functional change intended.llvm-svn: 353728

            List of files:
            /llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp</description>
        <pubDate>Mon, 11 Feb 2019 17:55:47 +0000</pubDate>
        <dc:creator>Andrea Di Biagio &lt;Andrea_DiBiagio@sn.scee.net&gt;</dc:creator>
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<item>
        <title>83e68854 - [MCA] Return a mask of busy resources from method ResourceManager::checkAvailability(). NFCI</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp#83e68854</link>
        <description>[MCA] Return a mask of busy resources from method ResourceManager::checkAvailability(). NFCIIn case of bottlenecks caused by pipeline pressure, we want to be able tocorrectly report the set of problematic pipelines. This is a first step towardsadding support for bottleneck hints in llvm-mca (see PR37494). No functionalchange intended.llvm-svn: 353706

            List of files:
            /llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp</description>
        <pubDate>Mon, 11 Feb 2019 14:53:04 +0000</pubDate>
        <dc:creator>Andrea Di Biagio &lt;Andrea_DiBiagio@sn.scee.net&gt;</dc:creator>
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<item>
        <title>2946cd70 - Update the file headers across all of the LLVM projects in the monorepo</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp#2946cd70</link>
        <description>Update the file headers across all of the LLVM projects in the monorepoto reflect the new license.We understand that people may be surprised that we&apos;re moving the headerentirely to discuss the new license. We checked this carefully with theFoundation&apos;s lawyer and we believe this is the correct approach.Essentially, all code in the project is now made available by the LLVMproject under our new license, so you will see that the license headersinclude that license only. Some of our contributors have contributedcode under our old license, and accordingly, we have retained a copy ofour old license notice in the top-level files in each project andrepository.llvm-svn: 351636

            List of files:
            /llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/Scheduler.cpp</description>
        <pubDate>Sat, 19 Jan 2019 08:50:56 +0000</pubDate>
        <dc:creator>Chandler Carruth &lt;chandlerc@gmail.com&gt;</dc:creator>
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