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    <title>Changes in OrcABISupport.cpp</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>17c790ca - [ORC][MIPS} Correct template parameter for stubAndPointerRangesOk function on Mips</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp#17c790ca</link>
        <description>[ORC][MIPS} Correct template parameter for stubAndPointerRangesOk function on MipsIt might be an oversight that pass OrcAArch64 as template parameter to stubAndPointerRangesOk on MIps.Reviewed By: lhamesDifferential Revision: https://reviews.llvm.org/D129076

            List of files:
            /llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp</description>
        <pubDate>Thu, 07 Jul 2022 12:57:23 +0000</pubDate>
        <dc:creator>Xiaodong Liu &lt;teaofmoli@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>acb408fb - [ORC] add lazy jit support for riscv64</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp#acb408fb</link>
        <description>[ORC] add lazy jit support for riscv64This adds resolver, indirection and trampoline stubs for riscv64,allowing lazy compilation to work.It assumes hard float extension exists. I don&apos;t know the proper way to detect it as Triple doesn&apos;t provide the interface to check riscv +f +d abi.I am also not sure if orclazy tests should be enabled because lli needs an additional -codemodel=melany for tests to pass.Reviewed By: lhamesDifferential Revision: https://reviews.llvm.org/D122543

            List of files:
            /llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp</description>
        <pubDate>Thu, 24 Mar 2022 01:46:36 +0000</pubDate>
        <dc:creator>Alex Fan &lt;alex.fan.q@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>31b5b121 - [ORC] Remove a spurious reinterpret_cast.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp#31b5b121</link>
        <description>[ORC] Remove a spurious reinterpret_cast.

            List of files:
            /llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp</description>
        <pubDate>Mon, 13 Jul 2020 19:37:18 +0000</pubDate>
        <dc:creator>Lang Hames &lt;lhames@gmail.com&gt;</dc:creator>
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<item>
        <title>fb7ef0bb - [ORC] Generalize emit re-entry, stub, etc. APIs for working addr != link addr.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp#fb7ef0bb</link>
        <description>[ORC] Generalize emit re-entry, stub, etc. APIs for working addr != link addr.This patch generalizes the APIs for writing re-entry blocks, trampolines andstubs to allow their final linked address to differ from the address oftheir initial working memory. This will allow these routines to be used withJITLinkMemoryManagers, which will in turn allow for unification of code pathsfor in-process and cross-process lazy JITing.

            List of files:
            /llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp</description>
        <pubDate>Mon, 13 Jul 2020 04:56:45 +0000</pubDate>
        <dc:creator>Lang Hames &lt;lhames@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>e4b4ab6d - [Support] Add error handling to sys::Process::getPageSize().</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp#e4b4ab6d</link>
        <description>[Support] Add error handling to sys::Process::getPageSize().This patch changes the return type of sys::Process::getPageSize toExpected&lt;unsigned&gt; to account for the fact that the underlying syscalls used toobtain the page size may fail (see below).For clients who use the page size as an optimization only this patch adds a newmethod, getPageSizeEstimate, which calls through to getPageSize but discardsany error returned and substitues a &quot;reasonable&quot; page size estimate estimateinstead. All existing LLVM clients are updated to call getPageSizeEstimaterather than getPageSize.On Unix, sys::Process::getPageSize is implemented in terms of getpagesize orsysconf, depending on which macros are set. The sysconf call is documented toreturn -1 on failure. On Darwin getpagesize is implemented in terms of sysconfand may also fail (though the manpage documentation does not mention this).These failures have been observed in practice when highly restrictive sandboxpermissions have been applied. Without this patch, the result is thatgetPageSize returns -1, which wreaks havoc on any subsequent code that wasassuming a sane page size value.&lt;rdar://problem/41654857&gt;Reviewers: dblaikie, echristoSubscribers: kristina, llvm-commitsTags: #llvmDifferential Revision: https://reviews.llvm.org/D59107llvm-svn: 360221

            List of files:
            /llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp</description>
        <pubDate>Wed, 08 May 2019 02:11:07 +0000</pubDate>
        <dc:creator>Lang Hames &lt;lhames@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>2946cd70 - Update the file headers across all of the LLVM projects in the monorepo</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp#2946cd70</link>
        <description>Update the file headers across all of the LLVM projects in the monorepoto reflect the new license.We understand that people may be surprised that we&apos;re moving the headerentirely to discuss the new license. We checked this carefully with theFoundation&apos;s lawyer and we believe this is the correct approach.Essentially, all code in the project is now made available by the LLVMproject under our new license, so you will see that the license headersinclude that license only. Some of our contributors have contributedcode under our old license, and accordingly, we have retained a copy ofour old license notice in the top-level files in each project andrepository.llvm-svn: 351636

            List of files:
            /llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp</description>
        <pubDate>Sat, 19 Jan 2019 08:50:56 +0000</pubDate>
        <dc:creator>Chandler Carruth &lt;chandlerc@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>789f4154 - [ORC][MIPS] Fill delay-slot after `jr` instruction</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp#789f4154</link>
        <description>[ORC][MIPS] Fill delay-slot after `jr` instructionMIPS `jr` instruction uses a delay-slot. To escape execution ofarbitrary instruction we should either fill the delay-slot by `nop`instruction or swap `jr` instruction and logically precedinginstruction. This fix implements the second method to generate a bitmore effective code.llvm-svn: 351001

            List of files:
            /llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp</description>
        <pubDate>Sat, 12 Jan 2019 11:12:08 +0000</pubDate>
        <dc:creator>Simon Atanasyan &lt;simon@atanasyan.com&gt;</dc:creator>
    </item>
<item>
        <title>f903f782 - [ORC][MIPS] Setup t9 register and call function through this register</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp#f903f782</link>
        <description>[ORC][MIPS] Setup t9 register and call function through this registerMIPS ABI states that every function must be called through jalr $t9. Inother words, a function expect that t9 register points to the beginningof its code. A function uses this register to calculate offset to theGlobal Offset Table and save it to the `gp` register.```lui   $gp, %hi(_gp_disp)addiu $gp, %lo(_gp_disp)addu  $gp, $gp, $t9```If `t9` and as a result `$gp` point to the wrong place the following codeloads incorrect value from GOT and passes control to invalid code.```lw    $v0,%call16(foo)($gp)jalr  $t9```OrcMips32 and OrcMips64 writeResolverCode methods pass control to theresolved address, but do not setup `$t9` before the call. The `t9` holdsvalue of the beginning of `resolver` code so any attempts to callroutines via GOT failed.This change fixes the problem. The `OrcLazy/hidden-visibility.ll` teststarts to pass correctly. Before the change it fails on MIPS because the`exitOnLazyCallThroughFailure` called from the resolver code could notcall libc routine `exit` via GOT.Differential Revision: http://reviews.llvm.org/D56058llvm-svn: 351000

            List of files:
            /llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp</description>
        <pubDate>Sat, 12 Jan 2019 11:12:04 +0000</pubDate>
        <dc:creator>Simon Atanasyan &lt;simon@atanasyan.com&gt;</dc:creator>
    </item>
<item>
        <title>4553cdaf - [ORC] Rename register in the OrcMips64 resolver code comments. NFC</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp#4553cdaf</link>
        <description>[ORC] Rename register in the OrcMips64 resolver code comments. NFCThe `fp` and `s8` register names are synonyms. But `fp` better reflectsa purpose of the register.llvm-svn: 350023

            List of files:
            /llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp</description>
        <pubDate>Sun, 23 Dec 2018 12:05:04 +0000</pubDate>
        <dc:creator>Simon Atanasyan &lt;simon@atanasyan.com&gt;</dc:creator>
    </item>
<item>
        <title>15b68b87 - [ORC] clang-format OrcMips32 and OrcMips64 code. NFC</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp#15b68b87</link>
        <description>[ORC] clang-format OrcMips32 and OrcMips64 code. NFCllvm-svn: 350022

            List of files:
            /llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp</description>
        <pubDate>Sun, 23 Dec 2018 12:05:00 +0000</pubDate>
        <dc:creator>Simon Atanasyan &lt;simon@atanasyan.com&gt;</dc:creator>
    </item>
<item>
        <title>da299817 - [ORC] Remove redundant instruction from MIPS resolver code. NFC</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp#da299817</link>
        <description>[ORC] Remove redundant instruction from MIPS resolver code. NFCIt&apos;s redundant to restore the `$a3` register twice.llvm-svn: 350021

            List of files:
            /llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp</description>
        <pubDate>Sun, 23 Dec 2018 12:04:55 +0000</pubDate>
        <dc:creator>Simon Atanasyan &lt;simon@atanasyan.com&gt;</dc:creator>
    </item>
<item>
        <title>5abf4bb5 - [MIPS] ORC JIT support</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp#5abf4bb5</link>
        <description>[MIPS] ORC JIT supportThis patch adds support for ORC JIT for mips/mips64 architecture.In common code $static is changed to __ORCstatic because on MIPSarchitecture &quot;$&quot; is a reserved character.Patch by Luka ErcegovcevicDifferential Revision: https://reviews.llvm.org/D49665llvm-svn: 341934

            List of files:
            /llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp</description>
        <pubDate>Tue, 11 Sep 2018 13:10:04 +0000</pubDate>
        <dc:creator>Petar Jovanovic &lt;petar.jovanovic@mips.com&gt;</dc:creator>
    </item>
<item>
        <title>a44d5fe3 - Remove redundant includes from lib/ExecutionEngine.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp#a44d5fe3</link>
        <description>Remove redundant includes from lib/ExecutionEngine.llvm-svn: 320621

            List of files:
            /llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp</description>
        <pubDate>Wed, 13 Dec 2017 21:30:50 +0000</pubDate>
        <dc:creator>Michael Zolotukhin &lt;mzolotukhin@apple.com&gt;</dc:creator>
    </item>
<item>
        <title>d4d6a1aa - [ORC] Fix a typo.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp#d4d6a1aa</link>
        <description>[ORC] Fix a typo.llvm-svn: 313346

            List of files:
            /llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp</description>
        <pubDate>Fri, 15 Sep 2017 06:50:19 +0000</pubDate>
        <dc:creator>Lang Hames &lt;lhames@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>4821c24d - [Orc] Rename OrcArchitectureSupport to OrcABISupport and add Win32 ABI support.</title>
        <link>http://172.16.0.5:8080/history/llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp#4821c24d</link>
        <description>[Orc] Rename OrcArchitectureSupport to OrcABISupport and add Win32 ABI support.This enables lazy JITing on Windows x86-64.Patch by David. Thanks David!llvm-svn: 268845

            List of files:
            /llvm-project-15.0.7/llvm/lib/ExecutionEngine/Orc/OrcABISupport.cpp</description>
        <pubDate>Sat, 07 May 2016 03:36:38 +0000</pubDate>
        <dc:creator>Lang Hames &lt;lhames@gmail.com&gt;</dc:creator>
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