Changes in Makefile

5553a793 - selftests/powerpc: Add flags.mk to support pmu buildable

Thu, 29 Feb 2024 09:37:10 +0000

selftests/powerpc: Add flags.mk to support pmu buildableWhen running `make -C powerpc/pmu run_tests` from top level selftestsdirectory, currently this error is being reported: make: Entering directory '/home/maddy/linux/tools/testing/selftests/powerpc/pmu' Makefile:40: warning: overriding recipe for target 'emit_tests' ../../lib.mk:111: warning: ignoring old recipe for target 'emit_tests' gcc -m64 count_instructions.c ../harness.c event.c lib.c ../utils.c loop.S -o /home/maddy/selftest_output//count_instructions In file included from count_instructions.c:13: event.h:12:10: fatal error: utils.h: No such file or directory 12 | #include "utils.h" | ^~~~~~~~~ compilation terminated.This is due to missing of include path in CFLAGS. That is, CFLAGS andGIT_VERSION macros are defined in the powerpc/ folder Makefile whichin this case is not involved.To address the failure in case of executing specific sub-folder testdirectly, a new rule file has been addded by the patch called "flags.mk"under selftest/powerpc/ folder and is linked to all the Makefile ofpowerpc/pmu sub-folders.Reported-by: Sachin Sant Signed-off-by: Madhavan Srinivasan Tested-by: Sachin Sant [mpe: Fixup ifeq, make GIT_VERSION simply expanded to avoid re-executing git describe]Signed-off-by: Michael Ellerman Link: https://msgid.link/20240229093711.581230-2-maddy@linux.ibm.com List of files: /linux-6.15/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile

37496845 - selftests/powerpc: Re-order *FLAGS to follow lib.mk

Thu, 29 Feb 2024 09:37:09 +0000

selftests/powerpc: Re-order *FLAGS to follow lib.mkIn some powerpc/ sub-folder Makefiles, CFLAGS are defined before lib.mkinclude. Clean it up by re-ordering the flags to follow after the mkinclude. This is needed to support sub-folders in powerpc/ buildable onits own.Signed-off-by: Madhavan Srinivasan Signed-off-by: Michael Ellerman Link: https://msgid.link/20240229093711.581230-1-maddy@linux.ibm.com List of files: /linux-6.15/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile

ab8bca92 - selftests/powerpc/pmu: Add test for hardware cache events

Fri, 10 Jun 2022 13:41:13 +0000

selftests/powerpc/pmu: Add test for hardware cache eventsThe testcase checks if the transalation of a generic hardware cacheevent is done properly via perf interface. The hardware cache events hastype as PERF_TYPE_HW_CACHE and each event points to raw event code id.Testcase checks different combination of cache level, cache eventoperation type and cache event result type and verify for a given eventcode, whether transalation matches with the current cache event mappingsvia perf interface.Signed-off-by: Kajol Jain Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220610134113.62991-36-atrajeev@linux.vnet.ibm.com List of files: /linux-6.15/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile

9ac92fec - selftests/powerpc/pmu: Add selftest for group constraint check for MMCRA thresh_sel field

Fri, 10 Jun 2022 13:41:12 +0000

selftests/powerpc/pmu: Add selftest for group constraint check for MMCRA thresh_sel fieldThresh select bits in the event code is used to program thresh_sel fieldin Monitor Mode Control Register A (MMCRA: 45-47). When schedulingevents as a group, all events in that group should match value in thesebits. Otherwise event open for the sibling events will fail.Testcase uses event code PM_MRK_INST_CMPL (0x401e0) as leader andanother event PM_THRESH_MET (0x101ec) as sibling event, and checks ifgroup constraint checks for thresh_sel field added correctly via perfinterface.Signed-off-by: Kajol Jain Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220610134113.62991-35-atrajeev@linux.vnet.ibm.com List of files: /linux-6.15/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile

c178606a - selftests/powerpc/pmu: Add selftest for group constraint check for MMCRA thresh_ctl field

Fri, 10 Jun 2022 13:41:11 +0000

selftests/powerpc/pmu: Add selftest for group constraint check for MMCRA thresh_ctl fieldThresh control bits in the event code is used to program thresh_ctlfield in Monitor Mode Control Register A (MMCRA: 48-55). When schedulingevents as a group, all events in that group should match value in thesebits. Otherwise event open for the sibling events will fail.Testcase uses event code PM_MRK_INST_CMPL (0x401e0) as leader andanother event PM_THRESH_MET (101ec) as sibling event, and checks ifgroup constraint checks for thresh_ctl field added correctly via perfinterface.Signed-off-by: Kajol Jain Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220610134113.62991-34-atrajeev@linux.vnet.ibm.com List of files: /linux-6.15/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile

142c9bd1 - selftests/powerpc/pmu: Add selftest for group constraint for unit and pmc field in p9

Fri, 10 Jun 2022 13:41:10 +0000

selftests/powerpc/pmu: Add selftest for group constraint for unit and pmc field in p9Unit and pmu bits in the event code is used to program unit and pmcfields in Monitor Mode Control Register 1 (MMCR1). For power9 platform,incase unit field value is within 6 to 9, one of the event in the groupshould use PMC4. Otherwise event_open should fail for that group.Signed-off-by: Kajol Jain Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220610134113.62991-33-atrajeev@linux.vnet.ibm.com List of files: /linux-6.15/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile

8eaca8c4 - selftests/powerpc/pmu: Add selftest for group constraint check for MMCRA thresh_cmp field

Fri, 10 Jun 2022 13:41:09 +0000

selftests/powerpc/pmu: Add selftest for group constraint check for MMCRA thresh_cmp fieldThresh compare bits for a event is used to program thresh compare fieldin Monitor Mode Control Register A (MMCRA: 9-18 bits for power9 andMMCRA: 8-18 bits for power10). When scheduling events as a group, allevents in that group should match value in thresh compare bits.Otherwise event open for the sibling events will fail.Testcase uses event code "0x401e0" as leader and another event "0x101ec"as sibling event, and checks for thresh compare constraint via perfinterface.Signed-off-by: Kajol Jain Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220610134113.62991-32-atrajeev@linux.vnet.ibm.com List of files: /linux-6.15/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile

291c01ed - selftests/powerpc/pmu: Add selftest for group constraint check for MMCR1 cache bits

Fri, 10 Jun 2022 13:41:08 +0000

selftests/powerpc/pmu: Add selftest for group constraint check for MMCR1 cache bitsData and instruction cache qualifier bits in the event code is used toprogram cache select field in Monitor Mode Control Register 1 (MMCR1:16-17). When scheduling events as a group, all events in that groupshould match value in these bits. Otherwise event open for the siblingevents will fail.Testcase uses event code "0x1100fc" as leader and other events like"0x23e054" and "0x13e054" as sibling events to checks for l1 cacheselect field constraints via perf interface.Signed-off-by: Kajol Jain Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220610134113.62991-31-atrajeev@linux.vnet.ibm.com List of files: /linux-6.15/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile

20b3073f - selftests/powerpc/pmu: Add selftest for group constraint check for MMCR0 l2l3_sel bits

Fri, 10 Jun 2022 13:41:07 +0000

selftests/powerpc/pmu: Add selftest for group constraint check for MMCR0 l2l3_sel bitsIn power10, L2L3 select bits in the event code is used to programl2l3_sel field in Monitor Mode Control Register 0 (MMCR0: 56-60). Whenscheduling events as a group, all events in that group should matchvalue in these bits. Otherwise event open for the sibling events willfail.Testcase uses event code "0x010000046080" as leader and another events"0x26880" and "0x010000026880" as sibling events, and checks forl2l3_sel constraints via perf interface for ISA v3.1 platform.Signed-off-by: Kajol Jain Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220610134113.62991-30-atrajeev@linux.vnet.ibm.com List of files: /linux-6.15/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile

8efeedf5 - selftests/powerpc/pmu: Add selftest for PERF_TYPE_HARDWARE events valid check

Fri, 10 Jun 2022 13:41:06 +0000

selftests/powerpc/pmu: Add selftest for PERF_TYPE_HARDWARE events valid checkTestcase to ensure that using invalid event in generic event forPERF_TYPE_HARDWARE will fail. Invalid generic events in power10 are:- PERF_COUNT_HW_BUS_CYCLES- PERF_COUNT_HW_STALLED_CYCLES_FRONTEND- PERF_COUNT_HW_STALLED_CYCLES_BACKEND- PERF_COUNT_HW_REF_CPU_CYCLESInvalid generic events in power9 are:- PERF_COUNT_HW_BUS_CYCLES- PERF_COUNT_HW_REF_CPU_CYCLESTestcase does event open for valid and invalid generic events to ensureevent open works for all valid events and fails for invalid events.Signed-off-by: Athira Rajeev Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220610134113.62991-29-atrajeev@linux.vnet.ibm.com List of files: /linux-6.15/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile

3f1a8742 - selftests/powerpc/pmu: Add selftest for event alternatives for power10

Fri, 10 Jun 2022 13:41:05 +0000

selftests/powerpc/pmu: Add selftest for event alternatives for power10Platform specific PMU supports alternative event for some of the eventcodes. During perf_event_open, it any event group doesn't matchconstraint check criteria, further lookup is done to find alternativeevent. Code checks to see if it is possible to schedule event as groupusing alternative events.Testcase exercises the alternative event find code for power10. Example,Using PMC1 to PMC4 in a group and again trying to schedulePM_CYC_ALT (0x0001e) will fail since this exceeds number of programmableevents in group. But since 0x600f4 is an alternative event for 0x0001e,it is possible to use 0x0001e in the group. Testcase uses suchcombination all events in power10 which has alternative event.Signed-off-by: Athira Rajeev Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220610134113.62991-28-atrajeev@linux.vnet.ibm.com List of files: /linux-6.15/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile

5958ad43 - selftests/powerpc/pmu: Add selftest for event alternatives for power9

Fri, 10 Jun 2022 13:41:04 +0000

selftests/powerpc/pmu: Add selftest for event alternatives for power9Platform specific PMU supports alternative event for some of the eventcodes. During perf_event_open, it any event group doesn't matchconstraint check criteria, further lookup is done to find alternativeevent. Code checks to see if it is possible to schedule event as groupusing alternative events.Testcase exercises the alternative event find code for power9. Example,since events in same PMC can't go in as a group, ideally usingPM_RUN_CYC_ALT (0x200f4) and PM_BR_TAKEN_CMPL (0x200fa) will fail. Butsince RUN_CYC (0x600f4) is alternative event for 0x200f4, it is possibleto use 0x600f4 and 0x200fa as group. Testcase uses such combination forall events in power9 which has an alternative event.Signed-off-by: Athira Rajeev Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220610134113.62991-27-atrajeev@linux.vnet.ibm.com List of files: /linux-6.15/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile

a77c6976 - selftests/powerpc/pmu: Add selftest for blacklist events check in power9

Fri, 10 Jun 2022 13:41:03 +0000

selftests/powerpc/pmu: Add selftest for blacklist events check in power9Some of the events are blacklisted in power9. The list of blacklistedevents are noted in power9-events-list.h When trying to do event openfor any of these blacklisted event will cause a failure. Testcaseensures that using blacklisted events will cause event_open to fail inpower9. This test is only applicable on power9 DD2.1 and DD2.2 and hencetest adds checks to skip on other platforms.Signed-off-by: Athira Rajeev Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220610134113.62991-26-atrajeev@linux.vnet.ibm.com List of files: /linux-6.15/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile

0c902633 - selftests/powerpc/pmu: Add selftest for reserved bit check for MMCRA thresh_ctl field

Fri, 10 Jun 2022 13:41:02 +0000

selftests/powerpc/pmu: Add selftest for reserved bit check for MMCRA thresh_ctl fieldTestcase for reserved bits in Monitor Mode Control Register A (MMCRA)thresh_ctl bits. For MMCRA[48:51]/[52:55]) Threshold Start/Stop,0b11110000/0b00001111 is reserved.Signed-off-by: Athira Rajeev Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220610134113.62991-25-atrajeev@linux.vnet.ibm.com List of files: /linux-6.15/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile

5196a279 - selftests/powerpc/pmu: Add selftest for checking invalid bits in event code

Fri, 10 Jun 2022 13:41:01 +0000

selftests/powerpc/pmu: Add selftest for checking invalid bits in event codeSome of the bits in the event code is reserved for specific platforms.Event code bits 52-59 are reserved in power9, whereas in power10, theseare used for programming Monitor Mode Control Register 3 (MMCR3). Bit 9in event code is reserved in power9, whereas it is used for programming"radix_scope_qual" bit 18 in Monitor Mode Control Register 1 (MMCR1).Testcase to ensure that using reserved bits in event code should causeevent_open to fail.Signed-off-by: Athira Rajeev Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220610134113.62991-24-atrajeev@linux.vnet.ibm.com List of files: /linux-6.15/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile

122b6b9e - selftests/powerpc/pmu: Add selftest for group constraint check MMCRA sample bits

Fri, 10 Jun 2022 13:41:00 +0000

selftests/powerpc/pmu: Add selftest for group constraint check MMCRA sample bitsEvents with different "sample" field values which is used to programMonitor Mode Control Register A (MMCRA) in a group will fail toschedule. Testcase uses event with load only sampling mode as groupleader and event with store only sampling as sibling event. So that itcan check that using different sample bits in event code will fail inevent open for group of eventsSigned-off-by: Athira Rajeev Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220610134113.62991-23-atrajeev@linux.vnet.ibm.com List of files: /linux-6.15/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile

beebeecb - selftests/powerpc/pmu: Add selftest for group constraint for MMCRA Sampling Mode field

Fri, 10 Jun 2022 13:40:59 +0000

selftests/powerpc/pmu: Add selftest for group constraint for MMCRA Sampling Mode fieldTestcase for reserved bits in Monitor Mode Control Register A (MMCRA)Random Sampling Mode (SM) value. As per Instruction SetArchitecture (ISA), the values 0x5, 0x9, 0xD, 0x19, 0x1D, 0x1A, 0x1E arereserved for sampling mode field. Test that having these reserved bitvalues should cause event_open to fail. Input event code in testcasesuses these sampling bits along with 401e0 (PM_MRK_INST_CMPL).Signed-off-by: Athira Rajeev Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220610134113.62991-22-atrajeev@linux.vnet.ibm.com List of files: /linux-6.15/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile

dc431be3 - selftests/powerpc/pmu: Add selftest for group constraint check for radix_scope_qual field

Fri, 10 Jun 2022 13:40:58 +0000

selftests/powerpc/pmu: Add selftest for group constraint check for radix_scope_qual fieldTestcase for group constraint check for radix_scope_qual field which isused to program Monitor Mode Control Register (MMCR1) bit 18. All eventsin the group should match radix_scope_qual bit, otherwise event_open forthe group should fail. Testcase uses "0x14242" (PM_DATA_RADIX_PROCESS_L2_PTE_FROM_L2)with radix_scope_qual bit set for power10.Signed-off-by: Athira Rajeev Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220610134113.62991-21-atrajeev@linux.vnet.ibm.com List of files: /linux-6.15/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile

38b6da45 - selftests/powerpc/pmu: Add selftest for group constraint check when using same PMC

Fri, 10 Jun 2022 13:40:57 +0000

selftests/powerpc/pmu: Add selftest for group constraint check when using same PMCTestcase for group constraint check when using events with same PMC.Multiple events in a group asking for same PMC should fail. Testcaseuses "0x22C040" on PMC2 as leader and also subling which is expected tofail. Using PMC1 for sibling event should pass the test.Signed-off-by: Athira Rajeev Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220610134113.62991-20-atrajeev@linux.vnet.ibm.com List of files: /linux-6.15/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile

827765a4 - selftests/powerpc/pmu: Add selftest to check constraint for number of counters in use.

Fri, 10 Jun 2022 13:40:56 +0000

selftests/powerpc/pmu: Add selftest to check constraint for number of counters in use.Testcase for group constraint check for number of counters in use. Thenumber of programmable counters is from PMC1 to PMC4. Testcase uses fourevents with PMC1 to PMC4 and 5th event without any PMC which is expectedto fail since it is exceeding the number of counters in use.Signed-off-by: Athira Rajeev Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220610134113.62991-19-atrajeev@linux.vnet.ibm.com List of files: /linux-6.15/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile