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    <title>Changes in Makefile</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>82e81b89 - riscv: migrate to the generic rule for built-in DTB</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile#82e81b89</link>
        <description>riscv: migrate to the generic rule for built-in DTBCommit 654102df2ac2 (&quot;kbuild: add generic support for built-in bootDTBs&quot;) introduced generic support for built-in DTBs.Select GENERIC_BUILTIN_DTB when built-in DTB support is enabled.To keep consistency across architectures, this commit also renamesCONFIG_BUILTIN_DTB_SOURCE to CONFIG_BUILTIN_DTB_NAME.Signed-off-by: Masahiro Yamada &lt;masahiroy@kernel.org&gt;Acked-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;Link: https://lore.kernel.org/r/20241222000836.2578171-1-masahiroy@kernel.orgSigned-off-by: Alexandre Ghiti &lt;alexghiti@rivosinc.com&gt;

            List of files:
            /linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile</description>
        <pubDate>Sun, 22 Dec 2024 00:08:25 +0000</pubDate>
        <dc:creator>Masahiro Yamada &lt;masahiroy@kernel.org&gt;</dc:creator>
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        <title>d60d57ab - riscv: dts: spacemit: add Banana Pi BPI-F3 board device tree</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile#d60d57ab</link>
        <description>riscv: dts: spacemit: add Banana Pi BPI-F3 board device treeBanana Pi BPI-F3 [1] is a industrial grade RISC-V development board, itdesign with SpacemiT K1 8 core RISC-V chip [2].Currently only support booting into console with only uart enabled,other features will be added soon later.Link: https://docs.banana-pi.org/en/BPI-F3/BananaPi_BPI-F3 [1]Link: https://www.spacemit.com/en/spacemit-key-stone-2/ [2]Signed-off-by: Yangyu Chen &lt;cyy@cyyself.name&gt;Acked-by: Jesse Taube &lt;jesse@rivosinc.com&gt;Acked-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;Signed-off-by: Yixun Lan &lt;dlan@gentoo.org&gt;

            List of files:
            /linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile</description>
        <pubDate>Tue, 30 Jul 2024 00:28:12 +0000</pubDate>
        <dc:creator>Yangyu Chen &lt;cyy@cyyself.name&gt;</dc:creator>
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        <title>2672031b - riscv: dts: Move BUILTIN_DTB_SOURCE to common Kconfig</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile#2672031b</link>
        <description>riscv: dts: Move BUILTIN_DTB_SOURCE to common KconfigThe BUILTIN_DTB_SOURCE was only configured for K210 before. SinceSOC_BUILTIN_DTB_DECLARE was removed at commit d5805af9fe9f (&quot;riscv: Fixbuiltin DTB handling&quot;) from patch [1], the kernel cannot choose one of thedtbs from then on and always take the first one dtb to use. Then, anothercommit 0ddd7eaffa64 (&quot;riscv: Fix BUILTIN_DTB for sifive and microchip soc&quot;)from patch [2] supports BUILTIN_DTB_SOURCE for other SoCs. However, thisfeature will only work if the Kconfig we use links the dtb we expected inthe first place as mentioned in the thread [3]. Thus, a configBUILTIN_DTB_SOURCE is needed for all SoCs to choose one dtb to use.For some considerations, this patch also removes default y if XIP_KERNELfor BUILTIN_DTB, as this requires setting a proper dtb to use on theBUILTIN_DTB_SOURCE, else the kernel with XIP but does not setBUILTIN_DTB_SOURCE or unselect BUILTIN_DTB will not boot.Also, this patch removes the default dtb string for k210 from Kconfig tonommu_k210_defconfig and nommu_k210_sdcard_defconfig to avoid complexKconfig settings for other SoCs in the future.[1] https://lore.kernel.org/linux-riscv/20201208073355.40828-5-damien.lemoal@wdc.com/[2] https://lore.kernel.org/linux-riscv/20210604120639.1447869-1-alex@ghiti.fr/[3] https://lore.kernel.org/linux-riscv/CAK7LNATt_56mO2Le4v4EnPnAfd3gC8S_Sm5-GCsfa=qXy=8Lrg@mail.gmail.com/Signed-off-by: Yangyu Chen &lt;cyy@cyyself.name&gt;Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;Acked-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;

            List of files:
            /linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile</description>
        <pubDate>Wed, 28 Feb 2024 08:52:54 +0000</pubDate>
        <dc:creator>Yangyu Chen &lt;cyy@cyyself.name&gt;</dc:creator>
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        <title>9439a0e8 - riscv: dts: sophgo: add Milk-V Pioneer board device tree</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile#9439a0e8</link>
        <description>riscv: dts: sophgo: add Milk-V Pioneer board device treeMilk-V Pioneer [1] is a developer motherboard based on SG2042in a standard mATX form factor.Currently only support booting into console with only uartenabled, other features will be added soon later.Link: https://milkv.io/pioneer [1]Reviewed-by: Guo Ren &lt;guoren@kernel.org&gt;Acked-by: Chao Wei &lt;chao.wei@sophgo.com&gt;Signed-off-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;

            List of files:
            /linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile</description>
        <pubDate>Wed, 04 Oct 2023 15:44:25 +0000</pubDate>
        <dc:creator>Chen Wang &lt;unicorn_wang@outlook.com&gt;</dc:creator>
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        <title>2bd9e071 - riscv: dts: sort makefile entries by directory</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile#2bd9e071</link>
        <description>riscv: dts: sort makefile entries by directoryNew additions to the list have tried to respect alphanumeric ordering,but the thing was out of order to start with. Sort it.Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;

            List of files:
            /linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile</description>
        <pubDate>Sat, 17 Jun 2023 20:27:35 +0000</pubDate>
        <dc:creator>Conor Dooley &lt;conor.dooley@microchip.com&gt;</dc:creator>
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        <title>5af4cb0c - riscv: dts: thead: add sipeed Lichee Pi 4A board device tree</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile#5af4cb0c</link>
        <description>riscv: dts: thead: add sipeed Lichee Pi 4A board device treeSipeed&apos;s Lichee Pi 4A development board uses Lichee Module 4A coremodule which is powered by T-HEAD&apos;s TH1520 SoC. Add minimal devicetree files for the core module and the development board.Support basic uart/gpio/dmac drivers, so supports booting to a basicshell.Signed-off-by: Jisheng Zhang &lt;jszhang@kernel.org&gt;Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;

            List of files:
            /linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile</description>
        <pubDate>Sat, 17 Jun 2023 16:15:27 +0000</pubDate>
        <dc:creator>Jisheng Zhang &lt;jszhang@kernel.org&gt;</dc:creator>
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        <title>2a93adfb - riscv: dts: allwinner: Add MangoPi MQ devicetree</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile#2a93adfb</link>
        <description>riscv: dts: allwinner: Add MangoPi MQ devicetreeThe MangoPi MQ is a tiny SBC built around the Allwinner D1s. Itsonboard peripherals include two USB Type-C ports (1 device, 1 host)and RTL8189FTV WLAN.A MangoPi MQ-R variant of the board also exists. The MQ-R has adifferent form factor, but the onboard peripherals are the same.Most D1 and D1s boards use a similar power tree, with the 1.8V railpowered by the SoC&apos;s internal LDOA, analog domains powered by ALDO,and the rest of the board powered by always-on fixed regulators. Toavoid duplication, factor out the regulator information that iscommon across boards.The board also exposes GPIO Port E via a FPC connector, which cansupport either a camera or an RMII Ethernet PHY. The additionalregulators supply that connector.Acked-by: Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;Acked-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;Reviewed-by: Guo Ren &lt;guoren@kernel.org&gt;Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;Acked-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;Link: https://lore.kernel.org/r/20230126045738.47903-6-samuel@sholland.orgSigned-off-by: Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;

            List of files:
            /linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile</description>
        <pubDate>Thu, 26 Jan 2023 04:57:32 +0000</pubDate>
        <dc:creator>Samuel Holland &lt;samuel@sholland.org&gt;</dc:creator>
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        <title>19ba9cf7 - RISC-V: kbuild: convert all use of SOC_FOO to ARCH_FOO</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile#19ba9cf7</link>
        <description>RISC-V: kbuild: convert all use of SOC_FOO to ARCH_FOOConvert all non user visible use of SOC_FOO symbols to their ARCH_FOOvariants. The canaan DTs are an outlier in that they&apos;re gated at thedirectory and the file level. Drop the directory level gating while weare swapping the symbol names over.Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;

            List of files:
            /linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile</description>
        <pubDate>Sun, 20 Nov 2022 21:34:44 +0000</pubDate>
        <dc:creator>Conor Dooley &lt;conor.dooley@microchip.com&gt;</dc:creator>
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        <title>4adb690a - riscv: dts: renesas: Add minimal DTS for Renesas RZ/Five SMARC EVK</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile#4adb690a</link>
        <description>riscv: dts: renesas: Add minimal DTS for Renesas RZ/Five SMARC EVKEnable the minimal blocks required for booting the Renesas RZ/FiveSMARC EVK with initramfs.Below are the blocks which are enabled:- CPG- CPU0- DDR (memory regions)- PINCTRL- PLIC- SCIF0As we are reusing the RZ/G2UL SoC base DTSI [0], RZ/G2UL SMARC SoM [1] andcarrier [2] board DTSIs which enables almost all the blocks supportedby the RZ/G2UL SMARC EVK and whereas on RZ/Five SoC we will be graduallyenabling the blocks hence the aliases for ETH/I2C are deleted and restof the IP blocks are marked as disabled/deleted.[0] arch/arm64/boot/dts/renesas/r9a07g043.dtsi[1] arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi[2] arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsiSigned-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;Acked-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;Link: https://lore.kernel.org/r/20221028165921.94487-6-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;

            List of files:
            /linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile</description>
        <pubDate>Fri, 28 Oct 2022 16:59:19 +0000</pubDate>
        <dc:creator>Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;</dc:creator>
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        <title>a4367627 - RISC-V: Add BeagleV Starlight Beta device tree</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile#a4367627</link>
        <description>RISC-V: Add BeagleV Starlight Beta device treeAdd initial device tree for the BeagleV Starlight Beta board. About 300of these boards were sent out as part of a now cancelled BeagleBoard.orgproject.I2C timing data is based on the device tree in the vendor u-boot port.Heartbeat LED added by Geert.Acked-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;Co-developed-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;Signed-off-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;Signed-off-by: Emil Renner Berthing &lt;kernel@esmil.dk&gt;

            List of files:
            /linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile</description>
        <pubDate>Sun, 10 Oct 2021 17:48:36 +0000</pubDate>
        <dc:creator>Emil Renner Berthing &lt;kernel@esmil.dk&gt;</dc:creator>
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        <title>0fa6107e - RISC-V: Initial DTS for Microchip ICICLE board</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile#0fa6107e</link>
        <description>RISC-V: Initial DTS for Microchip ICICLE boardAdd initial DTS for Microchip ICICLE board having onlyessential devices (clocks, sdhci, ethernet, serial, etc).The device tree is based on the U-Boot patch.https://patchwork.ozlabs.org/project/uboot/patch/20201110103414.10142-6-padmarao.begari@microchip.com/Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;

            List of files:
            /linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile</description>
        <pubDate>Wed, 03 Mar 2021 20:02:51 +0000</pubDate>
        <dc:creator>Atish Patra &lt;atish.patra@wdc.com&gt;</dc:creator>
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        <title>08734e05 - riscv: Use vendor name for K210 SoC support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile#08734e05</link>
        <description>riscv: Use vendor name for K210 SoC supportRename configuration options and directories related to the KendryteK210 SoC to use the SoC vendor name (canaan) instead of the &quot;kendryte&quot;branding name.Signed-off-by: Damien Le Moal &lt;damien.lemoal@wdc.com&gt;Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;

            List of files:
            /linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile</description>
        <pubDate>Sun, 13 Dec 2020 13:50:38 +0000</pubDate>
        <dc:creator>Damien Le Moal &lt;damien.lemoal@wdc.com&gt;</dc:creator>
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        <title>d5805af9 - riscv: Fix builtin DTB handling</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile#d5805af9</link>
        <description>riscv: Fix builtin DTB handlingAll SiPeed K210 MAIX boards have the exact same vendor, arch andimplementation IDs, preventing differentiation to select the correctdevice tree to use through the SOC_BUILTIN_DTB_DECLARE() macro. Thisresult in this macro to be useless and mandates changing the code ofthe sysctl driver to change the builtin device tree suitable for thetarget board.Fix this problem by removing the SOC_BUILTIN_DTB_DECLARE() macro sinceit is used only for the K210 support. The code searching the builtinDTBs using the vendor, arch an implementation IDs is also removed.Support for builtin DTB falls back to the simpler and more traditionalhandling of builtin DTB using the CONFIG_BUILTIN_DTB option, similarlyto other architectures.Signed-off-by: Damien Le Moal &lt;damien.lemoal@wdc.com&gt;Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;

            List of files:
            /linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile</description>
        <pubDate>Sun, 13 Dec 2020 13:50:37 +0000</pubDate>
        <dc:creator>Damien Le Moal &lt;damien.lemoal@wdc.com&gt;</dc:creator>
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        <title>8bb66174 - riscv: K210: Add a built-in device tree</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile#8bb66174</link>
        <description>riscv: K210: Add a built-in device treeThe K210&apos;s bootloader does not provide a device tree. Give the abilityto providea builtin one with the SOC_KENDRYTE_K210_BUILTIN_DTB option.If selected, this option result in the definition of a builtin DTBentry in the k210 sysctl driver.If defined, the builtin DTB entry points to the default k210.dts devicetree file and is keyed with the vendor ID 0x4B5, the arch ID0xE59889E6A5A04149 (&quot;Canaan AI&quot; in UTF-8 coded Chinese) and the impl ID0x4D41495832303030 (&quot;MAIX200&quot;). These values are reported by the SiPEEDMAIXDUINO board, the SiPEED MAIX Go board and the SiPEED Dan Dock board.[Thanks to Damien for the K210 IDs]Signed-off-by: Damien Le Moal &lt;damien.lemoal@wdc.com&gt;Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;

            List of files:
            /linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile</description>
        <pubDate>Tue, 14 Apr 2020 04:43:25 +0000</pubDate>
        <dc:creator>Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;</dc:creator>
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        <title>5ba568f5 - riscv: Add Kendryte K210 device tree</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile#5ba568f5</link>
        <description>riscv: Add Kendryte K210 device treeAdd a generic device tree for Kendryte K210 SoC based boards. This isfor now a very simple device tree describing the core elements of theSoC. This is suitable (and tested) for the Kendryte KD233 developmentboard, the Sipeed MAIX M1 Dan Dock board and the Sipeed MAIXDUINO board.Signed-off-by: Damien Le Moal &lt;damien.lemoal@wdc.com&gt;Reviewed-by: Sean Anderson &lt;seanga2@gmail.com&gt;Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;

            List of files:
            /linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile</description>
        <pubDate>Mon, 16 Mar 2020 00:47:41 +0000</pubDate>
        <dc:creator>Damien Le Moal &lt;damien.lemoal@wdc.com&gt;</dc:creator>
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        <title>8d4e048d - arch: riscv: add support for building DTB files from DT source data</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile#8d4e048d</link>
        <description>arch: riscv: add support for building DTB files from DT source dataSimilar to ARM64, add support for building DTB files from DT sourcedata for RISC-V boards.This patch starts with the infrastructure needed for SiFive boards.Boards from other vendors would add support here in a similar form.Signed-off-by: Paul Walmsley &lt;paul.walmsley@sifive.com&gt;Signed-off-by: Paul Walmsley &lt;paul@pwsan.com&gt;Tested-by: Loys Ollivier &lt;lollivier@baylibre.com&gt;Tested-by: Kevin Hilman &lt;khilman@baylibre.com&gt;Cc: Palmer Dabbelt &lt;palmer@sifive.com&gt;Cc: Albert Ou &lt;aou@eecs.berkeley.edu&gt;

            List of files:
            /linux-6.15/scripts/dtc/include-prefixes/riscv/Makefile</description>
        <pubDate>Mon, 20 May 2019 16:19:40 +0000</pubDate>
        <dc:creator>Paul Walmsley &lt;paul.walmsley@sifive.com&gt;</dc:creator>
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