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    <title>Changes in Makefile</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>6b64fde5 - reset: imx: Add SCU reset driver for i.MX8QXP and i.MX8QM</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/reset/Makefile#6b64fde5</link>
        <description>reset: imx: Add SCU reset driver for i.MX8QXP and i.MX8QMAdd System Controller Firmware(SCU) reset driver for i.MX8QM and i.MX8QXP.SCU Manage resets for peripherals such as MIPI CSI. Currently, support tworeset sources: IMX_SC_R_CSI_0 and IMX_SC_R_CSI_1.Signed-off-by: Frank Li &lt;Frank.Li@nxp.com&gt;Link: https://lore.kernel.org/r/20250210-8qxp_camera-v3-2-324f5105accc@nxp.comSigned-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux-6.15/drivers/reset/Makefile</description>
        <pubDate>Mon, 10 Feb 2025 20:59:21 +0000</pubDate>
        <dc:creator>Frank Li &lt;Frank.Li@nxp.com&gt;</dc:creator>
    </item>
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        <title>2c138ee3 - reset: amlogic: move drivers to a dedicated directory</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/reset/Makefile#2c138ee3</link>
        <description>reset: amlogic: move drivers to a dedicated directoryThe meson reset driver will be split in two part, one implemeting the ops,the other providing the platform driver support. This will be done tofacilitate the addition of the auxiliary bus support.To avoid making a mess in drivers/reset/ while doing so, move the amlogicreset drivers to a dedicated directory.Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;Signed-off-by: Jerome Brunet &lt;jbrunet@baylibre.com&gt;Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;Link: https://lore.kernel.org/r/20240910-meson-rst-aux-v5-7-60be62635d3e@baylibre.comSigned-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux-6.15/drivers/reset/Makefile</description>
        <pubDate>Tue, 10 Sep 2024 16:32:49 +0000</pubDate>
        <dc:creator>Jerome Brunet &lt;jbrunet@baylibre.com&gt;</dc:creator>
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        <title>487b1b32 - reset: eyeq: add platform driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/reset/Makefile#487b1b32</link>
        <description>reset: eyeq: add platform driverAdd Mobileye EyeQ reset controller driver, for EyeQ5, EyeQ6L and EyeQ6HSoCs. Instances belong to a shared register region called OLB and getsspawned as auxiliary device to the platform driver for clock.There is one OLB instance for EyeQ5 and EyeQ6L. There are seven OLBinstances on EyeQ6H; three have a reset controller embedded: - West and east get handled by the same compatible. - Acc (accelerator) is another one.Each instance vary in the number and types of reset domains.Instances with single domain expect a single cell, others two.Signed-off-by: Th&#233;o Lebrun &lt;theo.lebrun@bootlin.com&gt;Link: https://lore.kernel.org/r/20240730-mbly-reset-v2-2-00b870a6a2ff@bootlin.comSigned-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux-6.15/drivers/reset/Makefile</description>
        <pubDate>Tue, 30 Jul 2024 16:06:23 +0000</pubDate>
        <dc:creator>Th&#233;o Lebrun &lt;theo.lebrun@bootlin.com&gt;</dc:creator>
    </item>
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        <title>fd88137b - reset: tegra-bpmp: allow building under COMPILE_TEST</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/reset/Makefile#fd88137b</link>
        <description>reset: tegra-bpmp: allow building under COMPILE_TESTThe Tegra BPMP reset driver can be compiled without TEGRA_BPMP beingenabled. Allow it to be built under COMPILE_TEST.Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;Link: https://lore.kernel.org/r/20240625-reset-compile-bpmp-v1-1-647e846303d8@pengutronix.deSigned-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux-6.15/drivers/reset/Makefile</description>
        <pubDate>Tue, 25 Jun 2024 12:51:41 +0000</pubDate>
        <dc:creator>Philipp Zabel &lt;p.zabel@pengutronix.de&gt;</dc:creator>
    </item>
<item>
        <title>4f6a43ad - reset: zynqmp: allow building under COMPILE_TEST</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/reset/Makefile#4f6a43ad</link>
        <description>reset: zynqmp: allow building under COMPILE_TESTThe ZynqMP reset driver can be compiled without ARCH_ZYNQMP beingenabled. Allow it to be built under COMPILE_TEST.Acked-by: Michal Simek &lt;michal.simek@amd.com&gt;Link: https://lore.kernel.org/r/20240621-reset-compile-zynqmp-v1-1-ede43ab18101@pengutronix.deSigned-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux-6.15/drivers/reset/Makefile</description>
        <pubDate>Fri, 21 Jun 2024 15:24:47 +0000</pubDate>
        <dc:creator>Philipp Zabel &lt;p.zabel@pengutronix.de&gt;</dc:creator>
    </item>
<item>
        <title>fe125601 - reset: imx8mp-audiomix: Add AudioMix Block Control reset driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/reset/Makefile#fe125601</link>
        <description>reset: imx8mp-audiomix: Add AudioMix Block Control reset driverAdd support for the resets on i.MX8MP Audio Block Control module,which includes the EARC PHY software reset and EARC controllersoftware reset. The reset controller is created using the auxiliarydevice framework and set up in the clock driver.Signed-off-by: Shengjiu Wang &lt;shengjiu.wang@nxp.com&gt;Reviewed-by: Marco Felsch &lt;m.felsch@pengutronix.de&gt;Reviewed-by: Abel Vesa &lt;abel.vesa@linaro.org&gt;Link: https://lore.kernel.org/r/1719200345-32006-1-git-send-email-shengjiu.wang@nxp.comSigned-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux-6.15/drivers/reset/Makefile</description>
        <pubDate>Mon, 24 Jun 2024 03:39:05 +0000</pubDate>
        <dc:creator>Shengjiu Wang &lt;shengjiu.wang@nxp.com&gt;</dc:creator>
    </item>
<item>
        <title>1359fc27 - reset: sti: allow building under COMPILE_TEST</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/reset/Makefile#1359fc27</link>
        <description>reset: sti: allow building under COMPILE_TESTThe STIH407 reset driver can be compiled without ARCH_STI beingenabled. Allow it to be built under COMPILE_TEST.Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;Link: https://lore.kernel.org/r/20240621-reset-compile-sti-v1-1-b7a66ce29911@pengutronix.deSigned-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux-6.15/drivers/reset/Makefile</description>
        <pubDate>Fri, 21 Jun 2024 15:21:09 +0000</pubDate>
        <dc:creator>Philipp Zabel &lt;p.zabel@pengutronix.de&gt;</dc:creator>
    </item>
<item>
        <title>cee544a4 - reset: gpio: Add GPIO-based reset controller</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/reset/Makefile#cee544a4</link>
        <description>reset: gpio: Add GPIO-based reset controllerAdd a simple driver to control GPIO-based resets using the resetcontroller API for the cases when the GPIOs are shared and reset shouldbe coordinated.  The driver is expected to be used by reset coreframework for ad-hoc reset controllers.Cc: Bartosz Golaszewski &lt;brgl@bgdev.pl&gt;Cc: Chris Packham &lt;chris.packham@alliedtelesis.co.nz&gt;Cc: Sean Anderson &lt;sean.anderson@seco.com&gt;Reviewed-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;Link: https://lore.kernel.org/r/20240129115216.96479-4-krzysztof.kozlowski@linaro.orgSigned-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux-6.15/drivers/reset/Makefile</description>
        <pubDate>Mon, 29 Jan 2024 11:52:13 +0000</pubDate>
        <dc:creator>Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</dc:creator>
    </item>
<item>
        <title>e4bb55d6 - reset: Add Nuvoton ma35d1 reset driver support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/reset/Makefile#e4bb55d6</link>
        <description>reset: Add Nuvoton ma35d1 reset driver supportThis driver supports individual IP reset for the MA35D1. The resetcontrol registers are a subset of the system control registers.Signed-off-by: Jacky Huang &lt;ychuang3@nuvoton.com&gt;Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;Reviewed-by: Ilpo J&#228;rvinen &lt;ilpo.jarvinen@linux.intel.com&gt;Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;

            List of files:
            /linux-6.15/drivers/reset/Makefile</description>
        <pubDate>Mon, 05 Jun 2023 04:07:48 +0000</pubDate>
        <dc:creator>Jacky Huang &lt;ychuang3@nuvoton.com&gt;</dc:creator>
    </item>
<item>
        <title>ac59ed9c - reset: oxnas: remove obsolete reset driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/reset/Makefile#ac59ed9c</link>
        <description>reset: oxnas: remove obsolete reset driverDue to lack of maintainance and stall of development for a few years now,and since no new features will ever be added upstream, remove supportfor OX810 and OX820 peripheral reset.Signed-off-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;Acked-by: Daniel Golle &lt;daniel@makrotopia.org&gt;Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;Link: https://lore.kernel.org/r/20230331-topic-oxnas-upstream-remove-v1-17-5bd58fd1dd1f@linaro.orgSigned-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux-6.15/drivers/reset/Makefile</description>
        <pubDate>Fri, 31 Mar 2023 08:34:55 +0000</pubDate>
        <dc:creator>Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</dc:creator>
    </item>
<item>
        <title>69bfec75 - reset: Create subdirectory for StarFive drivers</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/reset/Makefile#69bfec75</link>
        <description>reset: Create subdirectory for StarFive driversThis moves the StarFive JH7100 reset driver to a new subdirectory inpreparation for adding more StarFive reset drivers.Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;Tested-by: Tommaso Merciai &lt;tomm.merciai@gmail.com&gt;Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;Reviewed-by: Emil Renner Berthing &lt;emil.renner.berthing@canonical.com&gt;Signed-off-by: Emil Renner Berthing &lt;kernel@esmil.dk&gt;Signed-off-by: Hal Feng &lt;hal.feng@starfivetech.com&gt;Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;

            List of files:
            /linux-6.15/drivers/reset/Makefile</description>
        <pubDate>Sat, 01 Apr 2023 11:19:20 +0000</pubDate>
        <dc:creator>Emil Renner Berthing &lt;kernel@esmil.dk&gt;</dc:creator>
    </item>
<item>
        <title>05f9e363 - reset: add polarfire soc reset support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/reset/Makefile#05f9e363</link>
        <description>reset: add polarfire soc reset supportAdd support for the resets on Microchip&apos;s PolarFire SoC (MPFS).Reset control is a single register, wedged in between registers forclock control. To fit with existed DT etc, the reset controller iscreated using the aux device framework &amp; set up in the clock driver.Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;Acked-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;Reviewed-by: Daire McNamara &lt;daire.mcnamara@microchip.com&gt;Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;Reviewed-by: Claudiu Beznea &lt;claudiu.beznea@microchip.com&gt;Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@microchip.com&gt;Link: https://lore.kernel.org/r/20220909123123.2699583-6-conor.dooley@microchip.com

            List of files:
            /linux-6.15/drivers/reset/Makefile</description>
        <pubDate>Fri, 09 Sep 2022 12:31:14 +0000</pubDate>
        <dc:creator>Conor Dooley &lt;conor.dooley@microchip.com&gt;</dc:creator>
    </item>
<item>
        <title>8a4e6154 - reset: tps380x: Add TPS380x device driver supprt</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/reset/Makefile#8a4e6154</link>
        <description>reset: tps380x: Add TPS380x device driver supprtThe TI TPS380x family [1] is a voltage supervisor with a dedicatedmanual reset (mr) line input and a reset output. The chip(s) have abuild in reset delay, depending on the chip partnumber. This simpledriver addresses this so the cosumer don&apos;t need to care about it.[1] https://www.ti.com/product/TPS3801Signed-off-by: Marco Felsch &lt;m.felsch@pengutronix.de&gt;[p.zabel@pengutronix.de: drop Todo comment about min/typ/max reset time]Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;Link: https://lore.kernel.org/r/20220530092226.748644-2-m.felsch@pengutronix.de

            List of files:
            /linux-6.15/drivers/reset/Makefile</description>
        <pubDate>Mon, 30 May 2022 09:22:26 +0000</pubDate>
        <dc:creator>Marco Felsch &lt;m.felsch@pengutronix.de&gt;</dc:creator>
    </item>
<item>
        <title>dbf018be - reset: Add Sunplus SP7021 reset driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/reset/Makefile#dbf018be</link>
        <description>reset: Add Sunplus SP7021 reset driverAdd reset driver for Sunplus SP7021 SoC.Signed-off-by: Qin Jian &lt;qinjian@cqplus1.com&gt;Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;

            List of files:
            /linux-6.15/drivers/reset/Makefile</description>
        <pubDate>Tue, 28 Jun 2022 06:26:43 +0000</pubDate>
        <dc:creator>Qin Jian &lt;qinjian@cqplus1.com&gt;</dc:creator>
    </item>
<item>
        <title>5cd3921d - reset: Add Delta TN48M CPLD reset controller</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/reset/Makefile#5cd3921d</link>
        <description>reset: Add Delta TN48M CPLD reset controllerDelta TN48M CPLD exposes resets for the following:* 88F7040 SoC* 88F6820 SoC* 98DX3265 switch MAC-s* 88E1680 PHY-s* 88E1512 PHY* PoE PSE controllerController supports only self clearing resets.Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;Reviewed-by: Andy Shevchenko &lt;andy.shevchenko@gmail.com&gt;Signed-off-by: Robert Marko &lt;robert.marko@sartura.hr&gt;Link: https://lore.kernel.org/r/20220131133049.77780-5-robert.marko@sartura.hrSigned-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

            List of files:
            /linux-6.15/drivers/reset/Makefile</description>
        <pubDate>Mon, 31 Jan 2022 13:30:47 +0000</pubDate>
        <dc:creator>Robert Marko &lt;robert.marko@sartura.hr&gt;</dc:creator>
    </item>
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        <title>0be3a159 - reset: starfive-jh7100: Add StarFive JH7100 reset driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/reset/Makefile#0be3a159</link>
        <description>reset: starfive-jh7100: Add StarFive JH7100 reset driverAdd a driver for the StarFive JH7100 reset controller.Reviewed-by: Andy Shevchenko &lt;andy.shevchenko@gmail.com&gt;Signed-off-by: Emil Renner Berthing &lt;kernel@esmil.dk&gt;

            List of files:
            /linux-6.15/drivers/reset/Makefile</description>
        <pubDate>Sun, 19 Sep 2021 12:21:05 +0000</pubDate>
        <dc:creator>Emil Renner Berthing &lt;kernel@esmil.dk&gt;</dc:creator>
    </item>
<item>
        <title>bee08559 - reset: renesas: Add RZ/G2L usbphy control driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/reset/Makefile#bee08559</link>
        <description>reset: renesas: Add RZ/G2L usbphy control driverAdd support for RZ/G2L USBPHY Control driver. It mainly controlsreset and power down of the USB/PHY.Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;Reviewed-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;Link: https://lore.kernel.org/r/20210719121938.6532-5-biju.das.jz@bp.renesas.comSigned-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux-6.15/drivers/reset/Makefile</description>
        <pubDate>Mon, 19 Jul 2021 12:19:32 +0000</pubDate>
        <dc:creator>Biju Das &lt;biju.das.jz@bp.renesas.com&gt;</dc:creator>
    </item>
<item>
        <title>590ff40e - reset: stm32mp1: remove stm32mp1 reset</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/reset/Makefile#590ff40e</link>
        <description>reset: stm32mp1: remove stm32mp1 resetst32mp1 RCC reset driver was moved into stm32mp1 RCC clock driver.Signed-off-by: Gabriel Fernandez &lt;gabriel.fernandez@foss.st.com&gt;Link: https://lore.kernel.org/r/20210617051814.12018-7-gabriel.fernandez@foss.st.comAcked-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/reset/Makefile</description>
        <pubDate>Thu, 17 Jun 2021 05:18:09 +0000</pubDate>
        <dc:creator>Gabriel Fernandez &lt;gabriel.fernandez@foss.st.com&gt;</dc:creator>
    </item>
<item>
        <title>453ed428 - reset: mchp: sparx5: add switch reset driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/reset/Makefile#453ed428</link>
        <description>reset: mchp: sparx5: add switch reset driverThe Sparx5 Switch SoC has a number of components that can be resetindiviually, but at least the Switch Core needs to be in a well definedstate at power on, when any of the Sparx5 drivers starts to access theSwitch Core, this reset driver is available.The reset driver is loaded early via the postcore_initcall interface, andwill then be available for the other Sparx5 drivers (SGPIO, SwitchDev etc)that are loaded next, and the first of them to be loaded can perform theone-time Switch Core reset that is needed.The driver has protection so that the system busses, DDR controller, PCI-Eand ARM A53 CPU and a few other subsystems are not touched by the reset.Signed-off-by: Steen Hegelund &lt;steen.hegelund@microchip.com&gt;Reviewed-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux-6.15/drivers/reset/Makefile</description>
        <pubDate>Fri, 16 Apr 2021 08:40:53 +0000</pubDate>
        <dc:creator>Steen Hegelund &lt;steen.hegelund@microchip.com&gt;</dc:creator>
    </item>
<item>
        <title>5a2308da - riscv: Add Canaan Kendryte K210 reset controller</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/reset/Makefile#5a2308da</link>
        <description>riscv: Add Canaan Kendryte K210 reset controllerAdd a reset controller driver for the Canaan Kendryte K210 SoC. Thisdriver relies on its syscon compatible parent node (sysctl) for itsregister mapping. Default this driver compilation to y when theSOC_CANAAN option is selected.The MAINTAINERS file is updated, adding the entry &quot;CANAAN/KENDRYTE K210SOC RESET CONTROLLER DRIVER&quot; with myself listed as maintainer for thisdriver.Signed-off-by: Damien Le Moal &lt;damien.lemoal@wdc.com&gt;Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;

            List of files:
            /linux-6.15/drivers/reset/Makefile</description>
        <pubDate>Sun, 13 Dec 2020 13:50:47 +0000</pubDate>
        <dc:creator>Damien Le Moal &lt;damien.lemoal@wdc.com&gt;</dc:creator>
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