Changes in Makefile

291f7856 - pinctrl: renesas: Initial R8A779H0 (R-Car V4M) PFC support

Fri, 26 Jan 2024 10:44:00 +0000

pinctrl: renesas: Initial R8A779H0 (R-Car V4M) PFC supportAdd initial pin control support for the R-Car V4M (R8A779H0) SoC,including bias, drive strength and voltage control.Signed-off-by: Cong Dang [geert: Fixes and cleanups]Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/5f59263e75be713dc954007cfeb2c99274c9d761.1706264667.git.geert+renesas@glider.be List of files: /linux-6.15/drivers/pinctrl/renesas/Makefile

47ea7ff1 - pinctrl: renesas: Remove R-Car H3 ES1.* handling

Tue, 07 Mar 2023 10:56:37 +0000

pinctrl: renesas: Remove R-Car H3 ES1.* handlingR-Car H3 ES1.* was only available to an internal development group andneeded a lot of quirks and workarounds. These become a maintenanceburden now, so our development group decided to remove upstream supportand disable booting for this SoC. Public users only have ES2 onwards.Signed-off-by: Wolfram Sang Reviewed-by: Laurent Pinchart Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20230307105645.5285-2-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven List of files: /linux-6.15/drivers/pinctrl/renesas/Makefile

ad9bb2fe - pinctrl: renesas: Initial R8A779G0 (R-Car V4H) PFC support

Fri, 01 Jul 2022 01:36:13 +0000

pinctrl: renesas: Initial R8A779G0 (R-Car V4H) PFC supportThis patch adds initial pinctrl support for the R-Car V4H (R8A779G0)SoC, including bias, drive strength and voltage control.This patch was created based on the Rev.0.51 datasheet.Signed-off-by: LUU HOAI Signed-off-by: Takeshi Kihara [Morimoto: merge Kihara-san's MODSEL8 fixup patch, cleanup white space, care about reserved bits on each configs, fixup comments, etc.]Signed-off-by: Kuninori Morimoto Link: https://lore.kernel.org/r/87czepty0j.wl-kuninori.morimoto.gx@renesas.comSigned-off-by: Geert Uytterhoeven List of files: /linux-6.15/drivers/pinctrl/renesas/Makefile

92a9b825 - pinctrl: renesas: Add RZ/V2M pin and gpio controller driver

Fri, 24 Jun 2022 08:48:33 +0000

pinctrl: renesas: Add RZ/V2M pin and gpio controller driverAdd support for pin and gpio controller driver for RZ/V2M SoC.Based on the RZ/G2L driver.Note that the DETDO and DETMS dedicated pins are currently notdocumented in the HW manual as to which pin group they are in.HW team has since said that the output level of 1.8V I/O group 4(for MD0-7, and debugger) is the same as the 1.8V I/O group 3.Signed-off-by: Phil Edworthy Reviewed-by: Lad Prabhakar Link: https://lore.kernel.org/r/20220624084833.22605-3-phil.edworthy@renesas.comSigned-off-by: Geert Uytterhoeven List of files: /linux-6.15/drivers/pinctrl/renesas/Makefile

030ac6d7 - pinctrl: renesas: Initial R8A779F0 PFC support

Mon, 21 Feb 2022 15:43:38 +0000

pinctrl: renesas: Initial R8A779F0 PFC supportAdd initial Pin Function Controller (PFC) support for the Renesas R-CarS4-8 (R8A779F0) SoC, including bias, drive strength and voltage control.Based on a larger patch in the BSP by LUU HOAI.Signed-off-by: Geert Uytterhoeven Acked-by: Yoshihiro Shimoda Link: https://lore.kernel.org/r/fd8201da404b7b0897130b254380ffc97f437266.1645457792.git.geert+renesas@glider.be List of files: /linux-6.15/drivers/pinctrl/renesas/Makefile

c4c4637e - pinctrl: renesas: Add RZ/G2L pin and gpio controller driver

Tue, 27 Jul 2021 11:23:26 +0000

pinctrl: renesas: Add RZ/G2L pin and gpio controller driverAdd support for pin and gpio controller driver for RZ/G2L SoC.Based on a patch in the BSP by Hien Huynh .Signed-off-by: Lad Prabhakar Reviewed-by: Biju Das Link: https://lore.kernel.org/r/20210727112328.18809-3-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: Geert Uytterhoeven List of files: /linux-6.15/drivers/pinctrl/renesas/Makefile

741a7370 - pinctrl: renesas: Initial R8A779A0 (V3U) PFC support

Tue, 12 Jan 2021 16:59:10 +0000

pinctrl: renesas: Initial R8A779A0 (V3U) PFC supportThis patch adds initial pinctrl support for the R8A779A0 (V3U) SoC,including bias, drive strength and voltage control.Based on patch by LUU HOAI .Signed-off-by: Ulrich Hecht Tested-by: Wolfram Sang Link: https://lore.kernel.org/r/20210112165912.30876-5-uli+renesas@fpond.euSigned-off-by: Geert Uytterhoeven List of files: /linux-6.15/drivers/pinctrl/renesas/Makefile

540d9757 - pinctrl: renesas: Reintroduce SH_PFC for common sh-pfc code

Wed, 09 Sep 2020 13:15:34 +0000

pinctrl: renesas: Reintroduce SH_PFC for common sh-pfc codeMost, but not all, Renesas pin control drivers use the "sh-pfc" pincontrol framework. As of commit 8449bfa9e6a9f7ec ("pinctrl: sh-pfc:Collect Renesas related CONFIGs in one place"), the code for thisframework is always built when Renesas SoC pin control support isenabled, regardless of whether the enabled pin control drivers need itor not.Fix this by reintroducing the CONFIG_SH_PFC symbol to control inclusionof the "sh-pfc" framework and its dependencies, and selecting it whenneeded.This reduces kernel size of a typical RZ/A1 or RZ/A2 kernel by more than6 resp. 11 KiB.Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20200909131534.12897-4-geert+renesas@glider.be List of files: /linux-6.15/drivers/pinctrl/renesas/Makefile

077365a9 - pinctrl: Rename sh-pfc to renesas

Wed, 09 Sep 2020 13:15:33 +0000

pinctrl: Rename sh-pfc to renesasThe drivers/pinctrl/sh-pfc subdirectory was originally created to grouppin control drivers for various Renesas SuperH and SH-Mobile platforms.However, the name "sh-pfc" no longer reflects its contents, as thedirectory now contains pin control drivers for Renesas SuperH, ARM32,and ARM64 SoCs.Hence rename the subdirectory from drivers/pinctrl/sh-pfc todrivers/pinctrl/renesas, and the related Kconfig symbol fromPINCTRL_SH_PFC to PINCTRL_RENESAS.Rename the git branch in MAINTAINERS, too, for consistency.Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20200909131534.12897-3-geert+renesas@glider.be List of files: /linux-6.15/drivers/pinctrl/renesas/Makefile