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    <title>Changes in Makefile</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>4a33bea0 - phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/xilinx/Makefile#4a33bea0</link>
        <description>phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit TransceiverXilinx ZynqMP SoCs have a Gigabit Transceiver with four lanes. All thehigh speed peripherals such as USB, SATA, PCIE, Display Port andEthernet SGMII can rely on any of the four GT lanes for PHY layer. Thispatch adds driver for that ZynqMP GT core.Signed-off-by: Anurag Kumar Vulisha &lt;anurag.kumar.vulisha@xilinx.com&gt;Signed-off-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;Link: https://lore.kernel.org/r/20200629120054.29338-3-laurent.pinchart@ideasonboard.comSigned-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/phy/xilinx/Makefile</description>
        <pubDate>Mon, 29 Jun 2020 12:00:53 +0000</pubDate>
        <dc:creator>Anurag Kumar Vulisha &lt;anurag.kumar.vulisha@xilinx.com&gt;</dc:creator>
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