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    <title>Changes in xusb.h</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>8b798761 - phy: tegra: xusb: Support sleepwalk for Tegra234</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/tegra/xusb.h#8b798761</link>
        <description>phy: tegra: xusb: Support sleepwalk for Tegra234Add new registers programming in sleepwalk sequence for Tegra234:MASTER_ENABLE_A/B/C/D in XUSB_AO_UTMIP_SLEEPWALK.Signed-off-by: Henry Lin &lt;henryl@nvidia.com&gt;Signed-off-by: Haotien Hsu &lt;haotienh@nvidia.com&gt;Link: https://lore.kernel.org/r/20230309061708.4156383-1-haotienh@nvidia.comSigned-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/phy/tegra/xusb.h</description>
        <pubDate>Thu, 09 Mar 2023 06:17:08 +0000</pubDate>
        <dc:creator>Henry Lin &lt;henryl@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>d8163a32 - phy: tegra: xusb: Add Tegra234 support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/tegra/xusb.h#d8163a32</link>
        <description>phy: tegra: xusb: Add Tegra234 supportAdd support for the XUSB pad controller found on Tegra234 SoCs. It ismostly similar to the same IP found on Tegra194, because most ofthe Tegra234 XUSB PADCTL registers definition and programming sequenceare the same as Tegra194, Tegra234 XUSB PADCTL can share the samedriver with Tegra186 and Tegra194 XUSB PADCTL.Introduce a new feature, USB2 HW tracking, for Tegra234.The feature is to enable HW periodical PAD tracking which measureand capture the electric parameters of USB2.0 PAD.Signed-off-by: Sing-Han Chen &lt;singhanc@nvidia.com&gt;Co-developed-by: Wayne Chang &lt;waynec@nvidia.com&gt;Signed-off-by: Wayne Chang &lt;waynec@nvidia.com&gt;Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;Link: https://lore.kernel.org/r/20230111110450.24617-6-jonathanh@nvidia.comSigned-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

            List of files:
            /linux-6.15/drivers/phy/tegra/xusb.h</description>
        <pubDate>Wed, 11 Jan 2023 11:04:49 +0000</pubDate>
        <dc:creator>Sing-Han Chen &lt;singhanc@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>5c7f94f8 - phy: tegra: xusb: Add Tegra234 support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/tegra/xusb.h#5c7f94f8</link>
        <description>phy: tegra: xusb: Add Tegra234 supportAdd support for the XUSB pad controller found on Tegra234 SoCs. It ismostly similar to the same IP found on Tegra194, because most ofthe Tegra234 XUSB PADCTL registers definition and programming sequenceare the same as Tegra194, Tegra234 XUSB PADCTL can share the samedriver with Tegra186 and Tegra194 XUSB PADCTL.Introduce a new feature, USB2 HW tracking, for Tegra234.The feature is to enable HW periodical PAD tracking which measureand capture the electric parameters of USB2.0 PAD.Signed-off-by: Sing-Han Chen &lt;singhanc@nvidia.com&gt;Co-developed-by: Wayne Chang &lt;waynec@nvidia.com&gt;Signed-off-by: Wayne Chang &lt;waynec@nvidia.com&gt;Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;Link: https://lore.kernel.org/r/20230111110450.24617-6-jonathanh@nvidia.comSigned-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/phy/tegra/xusb.h</description>
        <pubDate>Wed, 11 Jan 2023 11:04:49 +0000</pubDate>
        <dc:creator>Sing-Han Chen &lt;singhanc@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>2428787f - phy: tegra: xusb: Remove usb3 supply</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/tegra/xusb.h#2428787f</link>
        <description>phy: tegra: xusb: Remove usb3 supplyRemove redundant codes for getting the vbus supply of usb3 ports becausewe get and control the vbus supply by the companion usb2 portsSigned-off-by: Wayne Chang &lt;waynec@nvidia.com&gt;Signed-off-by: Haotien Hsu &lt;haotienh@nvidia.com&gt;Reviewed-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;Link: https://lore.kernel.org/r/20221005084031.2154251-1-haotienh@nvidia.comSigned-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/phy/tegra/xusb.h</description>
        <pubDate>Wed, 05 Oct 2022 08:40:31 +0000</pubDate>
        <dc:creator>Wayne Chang &lt;waynec@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>77bfa0fc - phy: tegra: xusb: add utmi pad power on/down ops</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/tegra/xusb.h#77bfa0fc</link>
        <description>phy: tegra: xusb: add utmi pad power on/down opsAdd utmi_pad_power_on/down ops for each SOC instead of exportingtegra_phy_xusb_utmi_pad_power_on/down directly for Tegra186 chip.Signed-off-by: BH Hsieh &lt;bhsieh@nvidia.com&gt;Signed-off-by: Jim Lin &lt;jilin@nvidia.com&gt;Link: https://lore.kernel.org/r/20220816082353.13390-2-jilin@nvidia.comSigned-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

            List of files:
            /linux-6.15/drivers/phy/tegra/xusb.h</description>
        <pubDate>Tue, 16 Aug 2022 08:23:52 +0000</pubDate>
        <dc:creator>Jim Lin &lt;jilin@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>c545a905 - phy: tegra: xusb: Add sleepwalk and suspend/resume</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/tegra/xusb.h#c545a905</link>
        <description>phy: tegra: xusb: Add sleepwalk and suspend/resumeThis commit adds sleepwalk/wake and suspend/resume interfacesto Tegra XUSB PHY driver.Tegra XUSB host controller driver makes use of sleepwalk functionsto enable/disable sleepwalk circuit which is in always-on partitionand can respond to USB resume signals when controller is not powered.Sleepwalk can be enabled/disabled for any USB UPHY individually.  - tegra_xusb_padctl_enable_phy_sleepwalk()  - tegra_xusb_padctl_disable_phy_sleepwalk()Tegra XUSB host controller driver makes use of wake functions toenable/disable/query wake circuit which is in always-on partitioncan wake system up when USB resume happens.Wake circuit can be enabled/disabled for any USB PHY individually.  - tegra_xusb_padctl_enable_phy_wake()  - tegra_xusb_padctl_disable_phy_wake()  - tegra_xusb_padctl_remote_wake_detected()This commit also adds two system suspend stubs that can be used tosave and restore XUSB PADCTL context during system suspend andresume.  - tegra_xusb_padctl_suspend_noirq()  - tegra_xusb_padctl_resume_noirq()Signed-off-by: JC Kuo &lt;jckuo@nvidia.com&gt;Acked-By: Vinod Koul &lt;vkoul@kernel.org&gt;Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;

            List of files:
            /linux-6.15/drivers/phy/tegra/xusb.h</description>
        <pubDate>Wed, 20 Jan 2021 07:34:06 +0000</pubDate>
        <dc:creator>JC Kuo &lt;jckuo@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>c339605c - phy: tegra: xusb: Add Tegra210 lane_iddq operation</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/tegra/xusb.h#c339605c</link>
        <description>phy: tegra: xusb: Add Tegra210 lane_iddq operationAs per Tegra210 TRM, before changing lane assignments, driver shouldkeep lanes in IDDQ and sleep state; after changing lane assignments,driver should bring lanes out of IDDQ.This commit implements the required operations.Signed-off-by: JC Kuo &lt;jckuo@nvidia.com&gt;Acked-By: Vinod Koul &lt;vkoul@kernel.org&gt;Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;

            List of files:
            /linux-6.15/drivers/phy/tegra/xusb.h</description>
        <pubDate>Wed, 20 Jan 2021 07:34:05 +0000</pubDate>
        <dc:creator>JC Kuo &lt;jckuo@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>2352fdb0 - phy: tegra: xusb: Rearrange UPHY init on Tegra210</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/tegra/xusb.h#2352fdb0</link>
        <description>phy: tegra: xusb: Rearrange UPHY init on Tegra210This commit is a preparation for enabling XUSB SC7 support.It rearranges Tegra210 XUSB PADCTL UPHY initialization sequence,for the following reasons:1. PLLE hardware power sequencer has to be enabled only after both   PEX UPHY PLL and SATA UPHY PLL are initialized.   tegra210_uphy_init() -&gt; tegra210_pex_uphy_enable()                        -&gt; tegra210_sata_uphy_enable()                        -&gt; tegra210_plle_hw_sequence_start()                        -&gt; tegra210_aux_mux_lp0_clamp_disable()2. At cold boot and SC7 exit, the following bits must be cleared after   PEX/SATA lanes are out of IDDQ (IDDQ_DISABLE=1).   a. XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_CLAMP_EN,   b. XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_CLAMP_EN_EARLY   c. XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_VCORE_DOWN   tegra210_pex_uphy_enable() and tegra210_sata_uphy_enable() are in   charge of bringing lanes out of IDDQ, and then AUX_MUX_LP0_* bits   will be cleared by tegra210_aux_mux_lp0_clamp_disable().3. Once UPHY PLL hardware power sequencer is enabled, do not assert   reset to PEX/SATA PLLs, otherwise UPHY PLL operation will be broken.Signed-off-by: JC Kuo &lt;jckuo@nvidia.com&gt;Acked-By: Vinod Koul &lt;vkoul@kernel.org&gt;Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;

            List of files:
            /linux-6.15/drivers/phy/tegra/xusb.h</description>
        <pubDate>Wed, 20 Jan 2021 07:34:04 +0000</pubDate>
        <dc:creator>JC Kuo &lt;jckuo@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>23d5ec3f - phy: tegra: xusb: Move usb3 port init for Tegra210</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/tegra/xusb.h#23d5ec3f</link>
        <description>phy: tegra: xusb: Move usb3 port init for Tegra210The programming sequence in tegra210_usb3_port_enable() is requiredfor both cold boot and SC7 exit, and must be performed only afterPEX/SATA UPHY is initialized. Therefore, this commit moves theprogramming sequence to tegra210_usb3_phy_power_on(). PCIE/SATA phy.power_on() stub will invoke tegra210_usb3_phy_power_on() if the laneis assigned for XUSB super-speed.Signed-off-by: JC Kuo &lt;jckuo@nvidia.com&gt;Acked-By: Vinod Koul &lt;vkoul@kernel.org&gt;Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;

            List of files:
            /linux-6.15/drivers/phy/tegra/xusb.h</description>
        <pubDate>Wed, 20 Jan 2021 07:34:03 +0000</pubDate>
        <dc:creator>JC Kuo &lt;jckuo@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>e78fdbad - phy: tegra: Don&apos;t use device-managed API to allocate ports</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/tegra/xusb.h#e78fdbad</link>
        <description>phy: tegra: Don&apos;t use device-managed API to allocate portsThe device-managed allocation API doesn&apos;t work well with the life-cycleof device objects. Since ports have device objects allocated within, itcan lead to situations where these devices need to stay around untilafter their parent pad controller has been unbound from its driver. Thedevice-managed memory allocated for the port objects will, however, getfreed when the pad controller unbinds from the driver. This can causeuse-after-free errors down the road.Note that the device is deleted as part of the driver unbind operation,so there isn&apos;t much that can be done with it after that point, but thememory still needs to stay around to ensure none of the references areinvalidated.One situation where this arises is when a VBUS supply is associated witha USB 2 or 3 port. When that supply is released using regulator_put() anSRCU call will queue the release of the device link connecting the portand the regulator after a grace period. This means that the regulator isgoing to keep on to the last reference of the port device even after thepad controller driver was unbound (which is when the memory backing theport device is freed).Fix this by allocating port objects using non-device-managed memory. Addrelease callbacks for these objects so that their memory gets freed whenthe last reference goes away. This decouples the port devices&apos; lifetimefrom the &quot;active&quot; lifetime of the pad controller (i.e. the time duringwhich the pad controller driver owns the device).Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;

            List of files:
            /linux-6.15/drivers/phy/tegra/xusb.h</description>
        <pubDate>Thu, 19 Mar 2020 10:52:13 +0000</pubDate>
        <dc:creator>Thierry Reding &lt;treding@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>2f8da84d - phy: tegra: Fix regulator leak</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/tegra/xusb.h#2f8da84d</link>
        <description>phy: tegra: Fix regulator leakDevices are created for each port of the XUSB pad controller. Each USB 2and USB 3 port can potentially have an associated VBUS power supply thatneeds to be removed when the device is removed.Since port devices never bind to a driver, the driver core will not getto perform the cleanup of device-managed resources that usually happenson driver unbind.Now, the driver core will also perform device-managed resource cleanupfor driver-less devices when they are released. However, when a devicelink is created between the regulator and the port device, as part ofregulator_get(), the regulator takes a reference to the port device andprevents it from being released unless regulator_put() is called, whichwill never happen.Avoid this by using the non-device-managed API and manually releasingthe regulator reference when the port is unregistered.Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;

            List of files:
            /linux-6.15/drivers/phy/tegra/xusb.h</description>
        <pubDate>Wed, 18 Mar 2020 22:25:54 +0000</pubDate>
        <dc:creator>Thierry Reding &lt;treding@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>1ef535c6 - phy: tegra: xusb: Add Tegra194 support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/tegra/xusb.h#1ef535c6</link>
        <description>phy: tegra: xusb: Add Tegra194 supportAdd support for the XUSB pad controller found on Tegra194 SoCs. It ismostly similar to the same IP found on Tegra186, but the number ofpads exposed differs, as do the programming sequences. Because most ofthe Tegra194 XUSB PADCTL registers definition and programming sequenceare the same as Tegra186, Tegra194 XUSB PADCTL can share the samedriver, xusb-tegra186.c, with Tegra186 XUSB PADCTL.Tegra194 XUSB PADCTL supports up to USB 3.1 Gen 2 speed, however, itis possible for some platforms have long signal trace that could notprovide sufficient electrical environment for Gen 2 speed. This patchadds a &quot;maximum-speed&quot; property to usb3 ports which can be used tospecify the maximum supported speed for any particular USB 3.1 port.For a port that is not capable of SuperSpeedPlus, &quot;maximum-speed&quot;property should carry &quot;super-speed&quot;.Signed-off-by: JC Kuo &lt;jckuo@nvidia.com&gt;Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;

            List of files:
            /linux-6.15/drivers/phy/tegra/xusb.h</description>
        <pubDate>Wed, 12 Feb 2020 06:11:30 +0000</pubDate>
        <dc:creator>JC Kuo &lt;jckuo@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>e8f7d2f4 - phy: tegra: xusb: Add usb-phy support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/tegra/xusb.h#e8f7d2f4</link>
        <description>phy: tegra: xusb: Add usb-phy supportFor USB 2 ports that has usb-role-switch enabled, add usb-phy forcorresponding USB 2 phy. USB role changes from role switch are thenupdated to corresponding host and device mode drivers via usb-phy notifierblock.Signed-off-by: Nagarjuna Kristam &lt;nkristam@nvidia.com&gt;Acked-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;[treding@nvidia.com: rebase onto Greg&apos;s usb-next branch]Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;

            List of files:
            /linux-6.15/drivers/phy/tegra/xusb.h</description>
        <pubDate>Mon, 10 Feb 2020 08:11:30 +0000</pubDate>
        <dc:creator>Nagarjuna Kristam &lt;nkristam@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>f67213ce - phy: tegra: xusb: Add usb-role-switch support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/tegra/xusb.h#f67213ce</link>
        <description>phy: tegra: xusb: Add usb-role-switch supportIf usb-role-switch property is present in USB 2 port, registerusb-role-switch to receive usb role changes.Signed-off-by: Nagarjuna Kristam &lt;nkristam@nvidia.com&gt;Acked-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;[treding@nvidia.com: rebase onto Greg&apos;s usb-next branch]Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;

            List of files:
            /linux-6.15/drivers/phy/tegra/xusb.h</description>
        <pubDate>Mon, 10 Feb 2020 08:11:29 +0000</pubDate>
        <dc:creator>Nagarjuna Kristam &lt;nkristam@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>90767cdf - phy: tegra: xusb: Add vbus override support on Tegra210</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/tegra/xusb.h#90767cdf</link>
        <description>phy: tegra: xusb: Add vbus override support on Tegra210Tegra XUSB device control driver needs to control vbus overrideduring its operations, add API for the support.Signed-off-by: Nagarjuna Kristam &lt;nkristam@nvidia.com&gt;Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;

            List of files:
            /linux-6.15/drivers/phy/tegra/xusb.h</description>
        <pubDate>Fri, 18 Oct 2019 09:38:08 +0000</pubDate>
        <dc:creator>Nagarjuna Kristam &lt;nkristam@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>a5be28c3 - phy: tegra: xusb: Add usb3 port fake support on Tegra210</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/tegra/xusb.h#a5be28c3</link>
        <description>phy: tegra: xusb: Add usb3 port fake support on Tegra210On Tegra210, usb2 only otg/peripheral ports dont work in device mode.They need an assosciated usb3 port to work in device mode. Identifyan unused usb3 port and assign it as a fake USB3 port to USB2 onlyport whose mode is otg/peripheral.Based on work by BH Hsieh &lt;bhsieh@nvidia.com&gt;.Signed-off-by: Nagarjuna Kristam &lt;nkristam@nvidia.com&gt;Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;

            List of files:
            /linux-6.15/drivers/phy/tegra/xusb.h</description>
        <pubDate>Fri, 18 Oct 2019 09:38:07 +0000</pubDate>
        <dc:creator>Nagarjuna Kristam &lt;nkristam@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>2025cf9e - treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/tegra/xusb.h#2025cf9e</link>
        <description>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288Based on 1 normalized pattern(s):  this program is free software you can redistribute it and or modify  it under the terms and conditions of the gnu general public license  version 2 as published by the free software foundation this program  is distributed in the hope it will be useful but without any  warranty without even the implied warranty of merchantability or  fitness for a particular purpose see the gnu general public license  for more detailsextracted by the scancode license scanner the SPDX license identifier  GPL-2.0-onlyhas been chosen to replace the boilerplate/reference in 263 file(s).Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;Reviewed-by: Alexios Zavras &lt;alexios.zavras@intel.com&gt;Cc: linux-spdx@vger.kernel.orgLink: https://lkml.kernel.org/r/20190529141901.208660670@linutronix.deSigned-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

            List of files:
            /linux-6.15/drivers/phy/tegra/xusb.h</description>
        <pubDate>Wed, 29 May 2019 14:18:02 +0000</pubDate>
        <dc:creator>Thomas Gleixner &lt;tglx@linutronix.de&gt;</dc:creator>
    </item>
<item>
        <title>bbf71168 - phy: tegra: xusb: Add Tegra186 support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/tegra/xusb.h#bbf71168</link>
        <description>phy: tegra: xusb: Add Tegra186 supportAdd support for the XUSB pad controller found on Tegra186 SoCs. It ismostly similar to the same IP found on earlier chips, but the number ofpads exposed differs, as do the programming sequences.Note that the DVDD_PEX, DVDD_PEX_PLL, HVDD_PEX and HVDD_PEX_PLL powersupplies of the XUSB pad controller require strict power sequencing andare therefore controlled by the PMIC on Tegra186.Signed-off-by: JC Kuo &lt;jckuo@nvidia.com&gt;Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;[dan.carpenter@oracle.com: Fix testing the wrong variable in probe()]Signed-off-by: Dan Carpenter &lt;dan.carpenter@oracle.com&gt;[yuehaibing@huawei.com: Make two functions static to fix sparse warning]Signed-off-by: YueHaibing &lt;yuehaibing@huawei.com&gt;Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;

            List of files:
            /linux-6.15/drivers/phy/tegra/xusb.h</description>
        <pubDate>Thu, 21 Feb 2019 15:46:34 +0000</pubDate>
        <dc:creator>JC Kuo &lt;jckuo@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>a630d54d - phy: tegra: xusb: Add support for power supplies</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/tegra/xusb.h#a630d54d</link>
        <description>phy: tegra: xusb: Add support for power suppliesSupport enabling various supplies needed to provide power to the PLLsand logic used to drive the USB, PCI and SATA pads.Reviewed-by: JC Kuo &lt;jckuo@nvidia.com&gt;Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;

            List of files:
            /linux-6.15/drivers/phy/tegra/xusb.h</description>
        <pubDate>Thu, 21 Feb 2019 15:46:33 +0000</pubDate>
        <dc:creator>Thierry Reding &lt;treding@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>5311a7b8 - phy: tegra: xusb: Parse dual-role mode property</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/tegra/xusb.h#5311a7b8</link>
        <description>phy: tegra: xusb: Parse dual-role mode propertyThe device tree bindings document the &quot;mode&quot; property of &quot;ports&quot;subnodes, but the driver was not parsing the property. In preparationfor adding role switching, parse the property at probe time.Based on work by JC Kuo &lt;jckuo@nvidia.com&gt;.Reviewed-by: JC Kuo &lt;jckuo@nvidia.com&gt;Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;

            List of files:
            /linux-6.15/drivers/phy/tegra/xusb.h</description>
        <pubDate>Thu, 21 Feb 2019 15:46:32 +0000</pubDate>
        <dc:creator>Thierry Reding &lt;treding@nvidia.com&gt;</dc:creator>
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