Changes in Makefile

82c56b6d - phy: freescale: imx8qm-hsio: Add i.MX8QM HSIO PHY driver support

Wed, 29 May 2024 06:02:45 +0000

phy: freescale: imx8qm-hsio: Add i.MX8QM HSIO PHY driver supportAdd i.MX8QM HSIO PHY driver support.i.MX8QM HSIO has three lane PHY instances, and can be bound to thefollowing controllers in the different use cases listed in below table.- two lanes capable PCIEA controller.- one lane PCIEB controller.- AHCI SATA controller.i.MX8QM HSIO PHYs support the following use cases.+----------------------------------------------------+| | Lane0| Lane1| Lane2||-------------------------------|------|------|------|| use case 1: PCIEAX2SATA | PCIEA| PCIEA| SATA ||-------------------------------|------|------|------|| use case 2: PCIEAX2PCIEB | PCIEA| PCIEA| PCIEB||-------------------------------|------|------|------|| use case 3: PCIEAPCIEBSATA | PCIEA| PCIEB| SATA |+----------------------------------------------------+Signed-off-by: Richard Zhu Reviewed-by: Frank Li Link: https://lore.kernel.org/r/1716962565-2084-3-git-send-email-hongxing.zhu@nxp.comSigned-off-by: Vinod Koul List of files: /linux-6.15/drivers/phy/freescale/Makefile

6ad082be - phy: freescale: add Samsung HDMI PHY

Tue, 27 Feb 2024 22:04:36 +0000

phy: freescale: add Samsung HDMI PHYThis adds the driver for the Samsung HDMI PHY found on thei.MX8MP SoC. Based on downstream implementation fromSandor Yu . According to the TRM, the PHYreceives parallel data from the link and serializes it. Italso sets the PLL clock needed for the TX serializer.Tested-by: Luca Ceresoli Tested-by: Richard Leitner Co-developed-by: Marco Felsch Signed-off-by: Marco Felsch Signed-off-by: Lucas Stach Tested-by: Alexander Stein Tested-by: Frieder Schrempf # Kontron BLSigned-off-by: Adam Ford Tested-by: Marek Vasut Tested-by: Luca Ceresoli Tested-by: Tommaso Merciai Link: https://lore.kernel.org/r/20240227220444.77566-3-aford173@gmail.comSigned-off-by: Vinod Koul List of files: /linux-6.15/drivers/phy/freescale/Makefile

06ff622d - phy: freescale: Add i.MX8qm Mixel LVDS PHY support

Wed, 06 Jul 2022 03:48:10 +0000

phy: freescale: Add i.MX8qm Mixel LVDS PHY supportAdd Freescale i.MX8qm LVDS PHY support.The PHY IP is from Mixel, Inc.Signed-off-by: Liu Ying Link: https://lore.kernel.org/r/20220706034810.2352641-4-victor.liu@nxp.comSigned-off-by: Vinod Koul List of files: /linux-6.15/drivers/phy/freescale/Makefile

8f73b37c - phy: add support for the Layerscape SerDes 28G

Fri, 11 Mar 2022 21:22:21 +0000

phy: add support for the Layerscape SerDes 28GThis patch adds a new generic PHY driver to support the Lynx 28G SerDesblock found on some of the Layerscape SoCs such as LX2160A.At the moment, only the following Ethernet protocols are supported:SGMII/1000Base-X and 10GBaseR.SerDes lanes which are not running an Ethernet protocol or a currentlysupported Ethenet protocol will be left as it was configured through theRCW (Reset Configuration Word) at boot time.At probe time, the platform driver will read the currentconfiguration of both PLLs found on a SerDes block and will determinewhat protocols are supported using that PLL.For example, if a PLL is configured to generate a clock net (frate) of5GHz the only protocols sustained by that PLL are SGMII/1000Base-X(using a quarter of the full clock rate) and QSGMII using the full clocknet frequency on the lane.On the .set_mode() callback, the PHY driver will first check if therequested operating mode (protocol) is even supported by the current PLLconfiguration and will error out if not.Then, the lane is reconfigured to run on the requested protocol.Signed-off-by: Ioana Ciornei Signed-off-by: David S. Miller List of files: /linux-6.15/drivers/phy/freescale/Makefile

1aa97b00 - phy: freescale: pcie: Initialize the imx8 pcie standalone phy driver

Thu, 02 Dec 2021 08:02:35 +0000

phy: freescale: pcie: Initialize the imx8 pcie standalone phy driverAdd the standalone i.MX8 PCIe PHY driver.Signed-off-by: Richard Zhu Tested-by: Marcel Ziswiler Reviewed-by: Tim Harvey Tested-by: Tim Harvey Link: https://lore.kernel.org/r/1638432158-4119-6-git-send-email-hongxing.zhu@nxp.comSigned-off-by: Vinod Koul List of files: /linux-6.15/drivers/phy/freescale/Makefile

f4c8116e - phy: Add driver for mixel mipi dphy found on NXP's i.MX8 SoCs

Thu, 20 Jun 2019 19:42:37 +0000

phy: Add driver for mixel mipi dphy found on NXP's i.MX8 SoCsThis adds support for the Mixel DPHY as found on i.MX8 CPUs but sincethis is an IP core it will likely be found on others in the future. Soinstead of adding this to the nwl host driver make it a generic PHYdriver.The driver supports the i.MX8MQ. Support for i.MX8QM and i.MX8QXP can beadded once the necessary system controller bits are in viamixel_dphy_devdata.Signed-off-by: Guido Günther Co-developed-by: Robert Chiras Signed-off-by: Robert Chiras Reviewed-by: Fabio Estevam Reviewed-by: Sam Ravnborg Signed-off-by: Kishon Vijay Abraham I List of files: /linux-6.15/drivers/phy/freescale/Makefile

ec8f24b7 - treewide: Add SPDX license identifier - Makefile/Kconfig

Sun, 19 May 2019 12:07:45 +0000

treewide: Add SPDX license identifier - Makefile/KconfigAdd SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any formThese files fall under the project license, GPL v2 only. The resulting SPDXlicense identifier is: GPL-2.0-onlySigned-off-by: Thomas Gleixner Signed-off-by: Greg Kroah-Hartman List of files: /linux-6.15/drivers/phy/freescale/Makefile

efe81bea - phy: add driver for Freescale i.MX8MQ USB3 PHY

Thu, 15 Nov 2018 14:12:47 +0000

phy: add driver for Freescale i.MX8MQ USB3 PHYThis is a cleaned up port of the downstream i.MX8MQ USB3 PHY driver.Signed-off-by: Li Jun Signed-off-by: Lucas Stach Signed-off-by: Kishon Vijay Abraham I List of files: /linux-6.15/drivers/phy/freescale/Makefile