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    <title>Changes in Makefile</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>c9be539e - phy: add NXP PTN3222 eUSB2 to USB2 redriver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/Makefile#c9be539e</link>
        <description>phy: add NXP PTN3222 eUSB2 to USB2 redriverThe NXP PTN3222 is the single-port eUSB2 to USB2 redriver that performstranslation between eUSB2 and USB2 signalling schemes. It supports allthree data rates: Low Speed, Full Speed and High Speed.The reset state enables autonegotiation of the PHY role and of the datarate, so no additional programming is required.Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;Tested-by: Konrad Dybcio &lt;konradybcio@kernel.org&gt;Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;Reviewed-by: Stephan Gerhold &lt;stephan.gerhold@linaro.org&gt;Tested-by: Stephan Gerhold &lt;stephan.gerhold@linaro.org&gt;Link: https://lore.kernel.org/r/20240830-nxp-ptn3222-v2-2-4c6d8535cf6c@linaro.orgSigned-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/phy/Makefile</description>
        <pubDate>Fri, 30 Aug 2024 08:20:46 +0000</pubDate>
        <dc:creator>Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;</dc:creator>
    </item>
<item>
        <title>b48baf69 - phy: nuvoton: add new driver for the Nuvoton MA35 SoC USB 2.0 PHY</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/Makefile#b48baf69</link>
        <description>phy: nuvoton: add new driver for the Nuvoton MA35 SoC USB 2.0 PHYNuvoton MA35 SoCs support DWC2 USB controller.Add the driver to drive the USB 2.0 PHY transceivers.Signed-off-by: Hui-Ping Chen &lt;hpchen0nvt@gmail.com&gt;Link: https://lore.kernel.org/r/20240805030356.14565-3-hpchen0nvt@gmail.comSigned-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/phy/Makefile</description>
        <pubDate>Mon, 05 Aug 2024 03:03:56 +0000</pubDate>
        <dc:creator>Hui-Ping Chen &lt;hpchen0nvt@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>d7d2818b - phy: airoha: Add PCIe PHY driver for EN7581 SoC.</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/Makefile#d7d2818b</link>
        <description>phy: airoha: Add PCIe PHY driver for EN7581 SoC.Introduce support for Airoha PCIe PHY controller available in EN7581SoC.Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;Tested-by: Zhengping Zhang &lt;zhengping.zhang@airoha.com&gt;Signed-off-by: Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;Link: https://lore.kernel.org/r/20ac99aa8628d97778594f606681db7f868f24fe.1718485860.git.lorenzo@kernel.orgSigned-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/phy/Makefile</description>
        <pubDate>Sat, 15 Jun 2024 21:15:42 +0000</pubDate>
        <dc:creator>Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;</dc:creator>
    </item>
<item>
        <title>eeda4945 - phy: realtek: usb: add new driver for the Realtek RTD SoC USB 2.0 PHY</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/Makefile#eeda4945</link>
        <description>phy: realtek: usb: add new driver for the Realtek RTD SoC USB 2.0 PHYRealtek DHC (digital home center) RTD SoCs support DWC3 XHCI USBcontroller. Added the driver to drive the USB 2.0 PHY transceivers.Note: New driver,remove the port status notification on legacy USB PHY.Use the generic PHY to notify the usb device connect and disconnect.To avoid using these PHYs would require describing the very samePHY using both the generic &quot;phy&quot; property and the deprecated &quot;usb-phy&quot;property.Signed-off-by: Stanley Chang &lt;stanley_chang@realtek.com&gt;Link: https://lore.kernel.org/r/20231213031203.4911-2-stanley_chang@realtek.comSigned-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

            List of files:
            /linux-6.15/drivers/phy/Makefile</description>
        <pubDate>Wed, 13 Dec 2023 03:10:07 +0000</pubDate>
        <dc:creator>Stanley Chang &lt;stanley_chang@realtek.com&gt;</dc:creator>
    </item>
<item>
        <title>7a784bcd - Revert &quot;phy: realtek: usb: Add driver for the Realtek SoC USB 2.0 PHY&quot;</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/Makefile#7a784bcd</link>
        <description>Revert &quot;phy: realtek: usb: Add driver for the Realtek SoC USB 2.0 PHY&quot;This reverts commit 134e6d25f6bd06071e5aac0a7eefcea6f7713955.The recently added Realtek PHY drivers depend on the new port statusnotification mechanism which was built on the deprecated USB PHYimplementation and devicetree binding.Specifically, using these PHYs would require describing the very samePHY using both the generic &quot;phy&quot; property and the deprecated &quot;usb-phy&quot;property which is clearly wrong.We should not be building new functionality on top of the legacy USB PHYimplementation even if it is currently stuck in some kind oftransitional limbo.Revert the new Realtek PHY drivers for now so that the port statusnotification interface can be reverted and replaced.Fixes: 134e6d25f6bd (&quot;phy: realtek: usb: Add driver for the Realtek SoC USB 2.0 PHY&quot;)Cc: stable@vger.kernel.org      # 6.6Cc: Stanley Chang &lt;stanley_chang@realtek.com&gt;Signed-off-by: Johan Hovold &lt;johan+linaro@kernel.org&gt;Link: https://lore.kernel.org/r/20231106110654.31090-3-johan+linaro@kernel.orgSigned-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

            List of files:
            /linux-6.15/drivers/phy/Makefile</description>
        <pubDate>Mon, 06 Nov 2023 11:06:53 +0000</pubDate>
        <dc:creator>Johan Hovold &lt;johan+linaro@kernel.org&gt;</dc:creator>
    </item>
<item>
        <title>134e6d25 - phy: realtek: usb: Add driver for the Realtek SoC USB 2.0 PHY</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/Makefile#134e6d25</link>
        <description>phy: realtek: usb: Add driver for the Realtek SoC USB 2.0 PHYRealtek DHC (digital home center) RTD SoCs support DWC3 XHCI USBcontroller. Added the driver to drive the USB 2.0 PHY transceivers.Signed-off-by: Stanley Chang &lt;stanley_chang@realtek.com&gt;Link: https://lore.kernel.org/r/20230725033318.8361-2-stanley_chang@realtek.comSigned-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

            List of files:
            /linux-6.15/drivers/phy/Makefile</description>
        <pubDate>Tue, 25 Jul 2023 03:31:53 +0000</pubDate>
        <dc:creator>Stanley Chang &lt;stanley_chang@realtek.com&gt;</dc:creator>
    </item>
<item>
        <title>16d3a71c - phy: starfive: Add JH7110 USB 2.0 PHY driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/Makefile#16d3a71c</link>
        <description>phy: starfive: Add JH7110 USB 2.0 PHY driverAdd Starfive JH7110 SoC USB 2.0 PHY driver support.USB 2.0 PHY default connect to Cadence USB controller.Signed-off-by: Minda Chen &lt;minda.chen@starfivetech.com&gt;Reviewed-by: Roger Quadros &lt;rogerq@kernel.org&gt;Link: https://lore.kernel.org/r/20230629075115.11934-4-minda.chen@starfivetech.comSigned-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/phy/Makefile</description>
        <pubDate>Thu, 29 Jun 2023 07:51:13 +0000</pubDate>
        <dc:creator>Minda Chen &lt;minda.chen@starfivetech.com&gt;</dc:creator>
    </item>
<item>
        <title>99d9ccd9 - phy: usb: Add USB2.0 phy driver for Sunplus SP7021</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/Makefile#99d9ccd9</link>
        <description>phy: usb: Add USB2.0 phy driver for Sunplus SP7021Add USB2.0 phy driver for Sunplus SP7021Signed-off-by: Vincent Shih &lt;vincent.sunplus@gmail.com&gt;Link: https://lore.kernel.org/r/1658717052-26142-2-git-send-email-vincent.sunplus@gmail.com[vkoul: remove trailing line in driver file]Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/phy/Makefile</description>
        <pubDate>Mon, 25 Jul 2022 02:44:11 +0000</pubDate>
        <dc:creator>Vincent Shih &lt;vincent.sunplus@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>a4a86d27 - phy: phy-can-transceiver: Add support for generic CAN transceiver driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/Makefile#a4a86d27</link>
        <description>phy: phy-can-transceiver: Add support for generic CAN transceiver driverThe driver adds support for generic CAN transceivers. Currentlythe modes supported by this driver are standby and normal modes for TITCAN1042 and TCAN1043 CAN transceivers.The transceiver is modelled as a phy with pins controlled by gpios, to putthe transceiver in various device functional modes. It also gets the phyattribute max_link_rate for the usage of CAN drivers.Signed-off-by: Aswath Govindraju &lt;a-govindraju@ti.com&gt;Acked-by: Marc Kleine-Budde &lt;mkl@pengutronix.de&gt;Link: https://lore.kernel.org/r/20210510051006.11393-4-a-govindraju@ti.comSigned-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/phy/Makefile</description>
        <pubDate>Mon, 10 May 2021 05:10:05 +0000</pubDate>
        <dc:creator>Aswath Govindraju &lt;a-govindraju@ti.com&gt;</dc:creator>
    </item>
<item>
        <title>2ff8a1ee - phy: Add Sparx5 ethernet serdes PHY driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/Makefile#2ff8a1ee</link>
        <description>phy: Add Sparx5 ethernet serdes PHY driverAdd the Microchip Sparx5 ethernet serdes PHY driver for the 6G, 10G and 25Ginterfaces available in the Sparx5 SoC.Signed-off-by: Bjarni Jonasson &lt;bjarni.jonasson@microchip.com&gt;Signed-off-by: Steen Hegelund &lt;steen.hegelund@microchip.com&gt;Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;Reviewed-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;Link: https://lore.kernel.org/r/20210218161451.3489955-4-steen.hegelund@microchip.comSigned-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/phy/Makefile</description>
        <pubDate>Thu, 18 Feb 2021 16:14:50 +0000</pubDate>
        <dc:creator>Steen Hegelund &lt;steen.hegelund@microchip.com&gt;</dc:creator>
    </item>
<item>
        <title>31de313d - PHY: Ingenic: Add USB PHY driver using generic PHY framework.</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/Makefile#31de313d</link>
        <description>PHY: Ingenic: Add USB PHY driver using generic PHY framework.Used the generic PHY framework API to create the PHY, this driversupoorts USB OTG PHY used in JZ4770 SoC, JZ4775 SoC, JZ4780 SoC,X1000 SoC, X1830 SoC and X2000 SoC.Co-developed-by: &#28422;&#40527;&#25391; (Qi Pengzhen) &lt;aric.pzqi@ingenic.com&gt;Signed-off-by: &#28422;&#40527;&#25391; (Qi Pengzhen) &lt;aric.pzqi@ingenic.com&gt;Signed-off-by: &#21608;&#29744;&#26480; (Zhou Yanjie) &lt;zhouyanjie@wanyeetech.com&gt;Tested-by: &#21608;&#27491; (Zhou Zheng) &lt;sernia.zhou@foxmail.com&gt;Tested-by: H. Nikolaus Schaller &lt;hns@goldelico.com&gt;Reviewed-by: Paul Cercueil &lt;paul@crapouillou.net&gt;Link: https://lore.kernel.org/r/20201116141906.11758-4-zhouyanjie@wanyeetech.comSigned-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/phy/Makefile</description>
        <pubDate>Mon, 16 Nov 2020 14:19:06 +0000</pubDate>
        <dc:creator>&#21608;&#29744;&#26480; (Zhou Yanjie) &lt;zhouyanjie@wanyeetech.com&gt;</dc:creator>
    </item>
<item>
        <title>1cce8f73 - phy: Add USB3 PHY support for Intel LGM SoC</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/Makefile#1cce8f73</link>
        <description>phy: Add USB3 PHY support for Intel LGM SoCAdd support for USB PHY on Intel LGM SoC.Signed-off-by: Ramuthevar Vadivel Murugan &lt;vadivel.muruganx.ramuthevar@linux.intel.com&gt;Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;Link: https://lore.kernel.org/r/20200828022312.52724-3-vadivel.muruganx.ramuthevar@linux.intel.comSigned-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/phy/Makefile</description>
        <pubDate>Fri, 28 Aug 2020 02:23:12 +0000</pubDate>
        <dc:creator>Ramuthevar Vadivel Murugan &lt;vadivel.muruganx.ramuthevar@linux.intel.com&gt;</dc:creator>
    </item>
<item>
        <title>4a33bea0 - phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/Makefile#4a33bea0</link>
        <description>phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit TransceiverXilinx ZynqMP SoCs have a Gigabit Transceiver with four lanes. All thehigh speed peripherals such as USB, SATA, PCIE, Display Port andEthernet SGMII can rely on any of the four GT lanes for PHY layer. Thispatch adds driver for that ZynqMP GT core.Signed-off-by: Anurag Kumar Vulisha &lt;anurag.kumar.vulisha@xilinx.com&gt;Signed-off-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;Link: https://lore.kernel.org/r/20200629120054.29338-3-laurent.pinchart@ideasonboard.comSigned-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/phy/Makefile</description>
        <pubDate>Mon, 29 Jun 2020 12:00:53 +0000</pubDate>
        <dc:creator>Anurag Kumar Vulisha &lt;anurag.kumar.vulisha@xilinx.com&gt;</dc:creator>
    </item>
<item>
        <title>133552bf - phy: Remove CONFIG_ARCH_* check for related subdir in Makefile</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/Makefile#133552bf</link>
        <description>phy: Remove CONFIG_ARCH_* check for related subdir in MakefileIf CONFIG_ARCH_ROCKCHIP is not set but COMPILE_TEST is set, the file inthe subdir rockchip can not be built due to CONFIG_ARCH_ROCKCHIP checkin drivers/phy/Makefile.Since the related configs in drivers/phy/rockchip/Kconfig depend onARCH_ROCKCHIP, so remove CONFIG_ARCH_ROCKCHIP check for subdir rockchipin drivers/phy/Makefile.The other CONFIG_ARCH_* about allwinner, amlogic, mediatek, renesas andtegra have the same situation, so remove them too.Signed-off-by: Tiezhu Yang &lt;yangtiezhu@loongson.cn&gt;Reviewed-by: Heiko Stuebner &lt;heiko@sntech.de&gt;Link: https://lore.kernel.org/r/1590412138-13903-2-git-send-email-yangtiezhu@loongson.cnSigned-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/phy/Makefile</description>
        <pubDate>Mon, 25 May 2020 13:08:58 +0000</pubDate>
        <dc:creator>Tiezhu Yang &lt;yangtiezhu@loongson.cn&gt;</dc:creator>
    </item>
<item>
        <title>92279423 - phy: intel-lgm-emmc: Add support for eMMC PHY</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/Makefile#92279423</link>
        <description>phy: intel-lgm-emmc: Add support for eMMC PHYAdd support for eMMC PHY on Intel&apos;s Lightning Mountain SoC.Signed-off-by: Ramuthevar Vadivel Murugan &lt;vadivel.muruganx.ramuthevar@linux.intel.com&gt;Reviewed-by: Andy Shevchenko &lt;andriy.shevchenko@intel.com&gt;Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;

            List of files:
            /linux-6.15/drivers/phy/Makefile</description>
        <pubDate>Tue, 17 Dec 2019 01:56:58 +0000</pubDate>
        <dc:creator>Ramuthevar Vadivel Murugan &lt;vadivel.muruganx.ramuthevar@linux.intel.com&gt;</dc:creator>
    </item>
<item>
        <title>4e99276a - phy: enable compile-testing for the Lantiq PHY drivers</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/Makefile#4e99276a</link>
        <description>phy: enable compile-testing for the Lantiq PHY driversUnconditionally include the lantiq subdirectory in the phy Makefile.All drivers in there have their dependencies maintained. One of these(optional) dependencies is COMPILE_TEST, however this can only beevaluated when Kconfig scans the lantiq subdirectory.Signed-off-by: Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;

            List of files:
            /linux-6.15/drivers/phy/Makefile</description>
        <pubDate>Sat, 27 Jul 2019 12:04:14 +0000</pubDate>
        <dc:creator>Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;</dc:creator>
    </item>
<item>
        <title>dddc97e8 - phy: dphy: Add configuration helpers</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/Makefile#dddc97e8</link>
        <description>phy: dphy: Add configuration helpersThe MIPI D-PHY spec defines default values and boundaries for most of theparameters it defines. Introduce helpers to help drivers get meaningfulvalues based on their current parameters, and validate the boundaries ofthese parameters if needed.Signed-off-by: Maxime Ripard &lt;maxime.ripard@bootlin.com&gt;Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;

            List of files:
            /linux-6.15/drivers/phy/Makefile</description>
        <pubDate>Fri, 07 Dec 2018 13:55:31 +0000</pubDate>
        <dc:creator>Maxime Ripard &lt;maxime.ripard@bootlin.com&gt;</dc:creator>
    </item>
<item>
        <title>efe81bea - phy: add driver for Freescale i.MX8MQ USB3 PHY</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/Makefile#efe81bea</link>
        <description>phy: add driver for Freescale i.MX8MQ USB3 PHYThis is a cleaned up port of the downstream i.MX8MQ USB3 PHY driver.Signed-off-by: Li Jun &lt;jun.li@nxp.com&gt;Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;

            List of files:
            /linux-6.15/drivers/phy/Makefile</description>
        <pubDate>Thu, 15 Nov 2018 14:12:47 +0000</pubDate>
        <dc:creator>Li Jun &lt;jun.li@nxp.com&gt;</dc:creator>
    </item>
<item>
        <title>51f6b410 - phy: add driver for Microsemi Ocelot SerDes muxing</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/Makefile#51f6b410</link>
        <description>phy: add driver for Microsemi Ocelot SerDes muxingThe Microsemi Ocelot can mux SerDes lanes (aka macros) to differentswitch ports or even make it act as a PCIe interface.This adds support for the muxing of the SerDes.Signed-off-by: Quentin Schulz &lt;quentin.schulz@bootlin.com&gt;Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;

            List of files:
            /linux-6.15/drivers/phy/Makefile</description>
        <pubDate>Thu, 04 Oct 2018 12:22:07 +0000</pubDate>
        <dc:creator>Quentin Schulz &lt;quentin.schulz@bootlin.com&gt;</dc:creator>
    </item>
<item>
        <title>5ab43d0f - phy: socionext: add USB3 PHY driver for UniPhier SoC</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/phy/Makefile#5ab43d0f</link>
        <description>phy: socionext: add USB3 PHY driver for UniPhier SoCAdd a driver for PHY interface built into USB3 controllerimplemented in UniPhier SoCs.This driver supports High-Speed PHY and Super-Speed PHY.Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;Signed-off-by: Motoya Tanigawa &lt;tanigawa.motoya@socionext.com&gt;Signed-off-by: Masami Hiramatsu &lt;masami.hiramatsu@linaro.org&gt;Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;

            List of files:
            /linux-6.15/drivers/phy/Makefile</description>
        <pubDate>Wed, 22 Aug 2018 03:50:32 +0000</pubDate>
        <dc:creator>Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;</dc:creator>
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