Changes in Makefile

e1dce564 - perf/marvell: Marvell PEM performance monitor support

Mon, 28 Oct 2024 05:53:09 +0000

perf/marvell: Marvell PEM performance monitor supportPCI Express Interface PMU includes various performance countersto monitor the data that is transmitted over the PCIe link. Thecounters track various inbound and outbound transactions whichincludes separate counters for posted/non-posted/completion TLPs.Also, inbound and outbound memory read requests along with theirlatencies can also be monitored. Address Translation Services(ATS)eventssuch as ATS Translation, ATS Page Request, ATS Invalidation along withtheir corresponding latencies are also supported.The performance counters are 64 bits wide.For instance,perf stat -e ib_tlp_pr tracks the inbound posted TLPs for the workload.Co-developed-by: Linu Cherian Signed-off-by: Linu Cherian Signed-off-by: Gowthami Thiagarajan Link: https://lore.kernel.org/r/20241028055309.17893-1-gthiagarajan@marvell.comSigned-off-by: Will Deacon List of files: /linux-6.15/drivers/perf/Makefile

4d5a7680 - perf: Add driver for Arm NI-700 interconnect PMU

Wed, 04 Sep 2024 17:34:03 +0000

perf: Add driver for Arm NI-700 interconnect PMUThe Arm NI-700 Network-on-Chip Interconnect has a relativelystraightforward design with a hierarchy of voltage, power, and clockdomains, where each clock domain then contains a number of interfaceunits and a PMU which can monitor events thereon. As such, it begets arelatively straightforward driver to interface those PMUs with perf.Even more so than with arm-cmn, users will require detailed knowledge ofthe wider system topology in order to meaningfully analyse anything,since the interconnect itself cannot know what lies beyond the boundaryof each inscrutably-numbered interface. Given that, for now they arealso expected to refer to the NI-700 documentation for the relevantevent IDs to provide as well. An identifier is implemented so we cancome back and add jevents if anyone really wants to.Signed-off-by: Robin Murphy Link: https://lore.kernel.org/r/9933058d0ab8138c78a61cd6852ea5d5ff48e393.1725470837.git.robin.murphy@arm.comSigned-off-by: Will Deacon List of files: /linux-6.15/drivers/perf/Makefile

8d75537b - perf/arm: Move 32-bit PMU drivers to drivers/perf/

Wed, 26 Jun 2024 22:32:27 +0000

perf/arm: Move 32-bit PMU drivers to drivers/perf/It is preferred to put drivers under drivers/ rather than under arch/.The PMU drivers also depend on arm_pmu.c, so it's better to place themall together.Acked-by: Mark Rutland Signed-off-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20240626-arm-pmu-3-9-icntr-v2-3-c9784b4f4065@kernel.orgSigned-off-by: Will Deacon List of files: /linux-6.15/drivers/perf/Makefile

c2b24812 - perf: starfive: Add StarLink PMU support

Thu, 29 Feb 2024 07:27:17 +0000

perf: starfive: Add StarLink PMU supportThis patch adds support for StarFive's StarLink PMU (PerformanceMonitor Unit). StarLink PMU integrates one or more CPU cores witha shared L3 memory system. The PMU supports overflow interrupt,up to 16 programmable 64bit event counters, and an independent64bit cycle counter. StarLink PMU is accessed via MMIO.Example Perf stat output:[root@user]# perf stat -a -e /starfive_starlink_pmu/cycles/ \ -e /starfive_starlink_pmu/read_miss/ \ -e /starfive_starlink_pmu/read_hit/ \ -e /starfive_starlink_pmu/release_request/ \ -e /starfive_starlink_pmu/write_hit/ \ -e /starfive_starlink_pmu/write_miss/ \ -e /starfive_starlink_pmu/write_request/ \ -e /starfive_starlink_pmu/writeback/ \ -e /starfive_starlink_pmu/read_request/ \ -- openssl speed rsa2048Doing 2048 bits private rsa's for 10s: 5 2048 bits private RSA's in2.84sDoing 2048 bits public rsa's for 10s: 169 2048 bits public RSA's in2.42sversion: 3.0.11built on: Tue Sep 19 13:02:31 2023 UTCoptions: bn(64,64)CPUINFO: N/A sign verify sign/s verify/srsa 2048 bits 0.568000s 0.014320s 1.8 69.8///////// Performance counter stats for 'system wide': 649991998 starfive_starlink_pmu/cycles/ 1009690 starfive_starlink_pmu/read_miss/ 1079750 starfive_starlink_pmu/read_hit/ 2089405 starfive_starlink_pmu/release_request/ 129 starfive_starlink_pmu/write_hit/ 70 starfive_starlink_pmu/write_miss/ 194 starfive_starlink_pmu/write_request/ 150080 starfive_starlink_pmu/writeback/ 2089423 starfive_starlink_pmu/read_request/ 27.062755678 seconds time elapsedSigned-off-by: Ji Sheng Teoh Link: https://lore.kernel.org/r/20240229072720.3987876-2-jisheng.teoh@starfivetech.comSigned-off-by: Will Deacon List of files: /linux-6.15/drivers/perf/Makefile

af9597ad - drivers/perf: add DesignWare PCIe PMU driver

Fri, 08 Dec 2023 02:56:51 +0000

drivers/perf: add DesignWare PCIe PMU driverThis commit adds the PCIe Performance Monitoring Unit (PMU) driver supportfor T-Head Yitian SoC chip. Yitian is based on the Synopsys PCI ExpressCore controller IP which provides statistics feature. The PMU is a PCIeconfiguration space register block provided by each PCIe Root Port in aVendor-Specific Extended Capability named RAS D.E.S (Debug, Errorinjection, and Statistics).To facilitate collection of statistics the controller provides thefollowing two features for each Root Port:- one 64-bit counter for Time Based Analysis (RX/TX data throughput and time spent in each low-power LTSSM state) and- one 32-bit counter for Event Counting (error and non-error events for a specified lane)Note: There is no interrupt for counter overflow.This driver adds PMU devices for each PCIe Root Port. And the PMU device isnamed based the BDF of Root Port. For example, 30:03.0 PCI bridge: Device 1ded:8000 (rev 01)the PMU device name for this Root Port is dwc_rootport_3018.Example usage of counting PCIe RX TLP data payload (Units of bytes):: $# perf stat -a -e dwc_rootport_3018/Rx_PCIe_TLP_Data_Payload/average RX bandwidth can be calculated like this: PCIe TX Bandwidth = Rx_PCIe_TLP_Data_Payload / Measure_Time_WindowSigned-off-by: Shuai Xue Reviewed-by: Baolin Wang Reviewed-by: Jonathan Cameron Reviewed-by: Yicong Yang Reviewed-and-tested-by: Ilkka Koskinen Link: https://lore.kernel.org/r/20231208025652.87192-5-xueshuai@linux.alibaba.com[will: Fix sparse error due to use of uninitialised 'vsec' symbol in dwc_pcie_match_des_cap()]Signed-off-by: Will Deacon List of files: /linux-6.15/drivers/perf/Makefile

5d7107c7 - perf: CXL Performance Monitoring Unit driver

Fri, 26 May 2023 09:58:23 +0000

perf: CXL Performance Monitoring Unit driverCXL rev 3.0 introduces a standard performance monitoring hardwareblock to CXL. Instances are discovered using CXL Register Locator DVSECentries. Each CXL component may have multiple PMUs.This initial driver supports a subset of types of counter.It supports counters that are either fixed or configurable, but requiresthat they support the ability to freeze and write value whilst frozen.Development done with QEMU model which will be posted shortly.Example:$ perf stat -a -e cxl_pmu_mem0.0/h2d_req_snpcur/ -e cxl_pmu_mem0.0/h2d_req_snpdata/ -e cxl_pmu_mem0.0/clock_ticks/ sleep 1Performance counter stats for 'system wide':96,757,023,244,321 cxl_pmu_mem0.0/h2d_req_snpcur/96,757,023,244,365 cxl_pmu_mem0.0/h2d_req_snpdata/193,514,046,488,653 cxl_pmu_mem0.0/clock_ticks/ 1.090539600 seconds time elapsedReviewed-by: Dave Jiang Reviewed-by: Kan Liang Signed-off-by: Jonathan Cameron Link: https://lore.kernel.org/r/20230526095824.16336-5-Jonathan.Cameron@huawei.comSigned-off-by: Dan Williams List of files: /linux-6.15/drivers/perf/Makefile

55691f99 - drivers/perf: imx_ddr: Add support for NXP i.MX9 SoC DDRC PMU driver

Tue, 18 Apr 2023 10:29:08 +0000

drivers/perf: imx_ddr: Add support for NXP i.MX9 SoC DDRC PMU driverAdd ddr performance monitor support for i.MX93.There are 11 counters for ddr performance events.- Counter 0 is a 64-bit counter that counts only clock cycles.- Counter 1-10 are 32-bit counters that can monitor counter-specific events in addition to counting reference events.For example: perf stat -a -e imx9_ddr0/ddrc_pm_1,counter=1/,imx9_ddr0/ddrc_pm_2,counter=2/ lsBesides, this ddr pmu support AXI filter capability. It's implemented ascounter-specific events. It now supports read transaction, write transactionand read beat events which corresponding respecitively to counter 2, 3 and 4.axi_mask and axi_id need to be as event parameters.For example: perf stat -a -I 1000 -e imx9_ddr0/eddrtq_pm_rd_trans_filt,counter=2,axi_mask=ID_MASK,axi_id=ID/ perf stat -a -I 1000 -e imx9_ddr0/eddrtq_pm_wr_trans_filt,counter=3,axi_mask=ID_MASK,axi_id=ID/ perf stat -a -I 1000 -e imx9_ddr0/eddrtq_pm_rd_beat_filt,counter=4,axi_mask=ID_MASK,axi_id=ID/Signed-off-by: Xu Yang Acked-by: Mark Rutland Link: https://lore.kernel.org/r/20230418102910.2065651-1-xu.yang_2@nxp.com[will: Remove redundant error message on platform_get_irq() failure]Signed-off-by: Will Deacon List of files: /linux-6.15/drivers/perf/Makefile

7755cec6 - arm64: perf: Move PMUv3 driver to drivers/perf

Fri, 17 Mar 2023 19:50:20 +0000

arm64: perf: Move PMUv3 driver to drivers/perfHaving the ARM PMUv3 driver sitting in arch/arm64/kernel is gettingin the way of being able to use perf on ARMv8 cores running a 32bitkernel, such as 32bit KVM guests.This patch moves it into drivers/perf/arm_pmuv3.c, with an includefile in include/linux/perf/arm_pmuv3.h. The only thing left inarch/arm64 is some mundane perf stuff.Signed-off-by: Marc Zyngier Signed-off-by: Zaid Al-Bassam Tested-by: Florian Fainelli Link: https://lore.kernel.org/r/20230317195027.3746949-2-zalbassam@google.comSigned-off-by: Will Deacon List of files: /linux-6.15/drivers/perf/Makefile

2016e211 - perf/amlogic: Add support for Amlogic meson G12 SoC DDR PMU driver

Mon, 21 Nov 2022 02:15:58 +0000

perf/amlogic: Add support for Amlogic meson G12 SoC DDR PMU driverAdd support for Amlogic Meson G12 Series SOC - DDR bandwidth PMU driverframework and interfaces. The PMU can not only monitor the total DDRbandwidth, but also individual IP module bandwidth.Signed-off-by: Jiucheng Xu Tested-by: Chris Healy Link: https://lore.kernel.org/r/20221121021602.3306998-1-jiucheng.xu@amlogic.comSigned-off-by: Will Deacon List of files: /linux-6.15/drivers/perf/Makefile

e37dfd65 - perf: arm_cspmu: Add support for ARM CoreSight PMU driver

Fri, 11 Nov 2022 22:23:28 +0000

perf: arm_cspmu: Add support for ARM CoreSight PMU driverAdd support for ARM CoreSight PMU driver framework and interfaces.The driver provides generic implementation to operate uncore PMU basedon ARM CoreSight PMU architecture. The driver also provides interfaceto get vendor/implementation specific information, for example eventattributes and formating.The specification used in this implementation can be found below: * ACPI Arm Performance Monitoring Unit table: https://developer.arm.com/documentation/den0117/latest * ARM Coresight PMU architecture: https://developer.arm.com/documentation/ihi0091/latestReviewed-by: Suzuki K Poulose Signed-off-by: Besar Wicaksono Link: https://lore.kernel.org/r/20221111222330.48602-2-bwicaksono@nvidia.comSigned-off-by: Will Deacon List of files: /linux-6.15/drivers/perf/Makefile

cf7b6107 - drivers/perf: add DDR Sub-System Driveway PMU driver for Yitian 710 SoC

Thu, 18 Aug 2022 03:18:21 +0000

drivers/perf: add DDR Sub-System Driveway PMU driver for Yitian 710 SoCAdd the DDR Sub-System Driveway Performance Monitoring Unit (PMU) driversupport for Alibaba T-Head Yitian 710 SoC chip. Yitian supports DDR5/4DRAM and targets cloud computing and HPC.Each PMU is registered as a device in /sys/bus/event_source/devices, andusers can select event to monitor in each sub-channel, independently. Forexample, ali_drw_21000 and ali_drw_21080 are two PMU devices for twosub-channels of the same channel in die 0. And the PMU device of die 1 isprefixed with ali_drw_400XXXXX, e.g. ali_drw_40021000.Due to hardware limitation, one of DDRSS Driveway PMU overflow interruptshares the same irq number with MPAM ERR_IRQ. To register DDRSS PMU andMPAM drivers successfully, add IRQF_SHARED flag.Signed-off-by: Shuai Xue Co-developed-by: Hongbo Yao Signed-off-by: Hongbo Yao Co-developed-by: Neng Chen Signed-off-by: Neng Chen Reviewed-by: Jonathan Cameron Reviewed-by: Baolin Wang Link: https://lore.kernel.org/r/20220818031822.38415-3-xueshuai@linux.alibaba.comSigned-off-by: Will Deacon List of files: /linux-6.15/drivers/perf/Makefile

e9991434 - RISC-V: Add perf platform driver based on SBI PMU extension

Sat, 19 Feb 2022 00:46:57 +0000

RISC-V: Add perf platform driver based on SBI PMU extensionRISC-V SBI specification added a PMU extension that allows to configurestart/stop any pmu counter. The RISC-V perf can use most of the genericperf features except interrupt overflow and event filtering based onprivilege mode which will be added in future.It also allows to monitor a handful of firmware counters that can provideinsights into firmware activity during a performance analysis.Signed-off-by: Atish Patra Signed-off-by: Atish Patra Signed-off-by: Palmer Dabbelt List of files: /linux-6.15/drivers/perf/Makefile

9b3e150e - RISC-V: Add a simple platform driver for RISC-V legacy perf

Sat, 19 Feb 2022 00:46:55 +0000

RISC-V: Add a simple platform driver for RISC-V legacy perfThe old RISC-V perf implementation allowed counting of onlycycle/instruction counters using perf. Restore that feature by implementinga simple platform driver under a separate config to provide backwardcompatibility. Any existing software stack will continue to work as it is.However, it provides an easy way out in future where we can remove thelegacy driver.Reviewed-by: Anup Patel Signed-off-by: Atish Patra Signed-off-by: Atish Patra Signed-off-by: Palmer Dabbelt List of files: /linux-6.15/drivers/perf/Makefile

f5bfa23f - RISC-V: Add a perf core library for pmu drivers

Sat, 19 Feb 2022 00:46:54 +0000

RISC-V: Add a perf core library for pmu driversImplement a perf core library that can support all the essential perffeatures in future. It can also accommodate any type of PMU implementationin future. Currently, both SBI based perf driver and legacy driverimplemented uses the library. Most of the common perf functionalitiesare kept in this core library wile PMU specific driver can implement PMUspecific features. For example, the SBI specific functionality will beimplemented in the SBI specific driver.Reviewed-by: Anup Patel Signed-off-by: Atish Patra Signed-off-by: Atish Patra Signed-off-by: Palmer Dabbelt List of files: /linux-6.15/drivers/perf/Makefile

a639027a - drivers/perf: Add Apple icestorm/firestorm CPU PMU driver

Tue, 08 Feb 2022 18:56:04 +0000

drivers/perf: Add Apple icestorm/firestorm CPU PMU driverAdd a new, weird and wonderful driver for the equally weird ApplePMU HW. Although the PMU itself is functional, we don't know muchabout the events yet, so this can be considered as yet anotherrandom number generator...Nonetheless, it can reliably count at least cycles and instructionsin the usually wonky big-little way. For anything else, it of coursesupports raw event numbers.Signed-off-by: Marc Zyngier Signed-off-by: Will Deacon List of files: /linux-6.15/drivers/perf/Makefile

7cf83e22 - perf/marvell: CN10k DDR performance monitor support

Fri, 11 Feb 2022 04:53:44 +0000

perf/marvell: CN10k DDR performance monitor supportMarvell CN10k DRAM Subsystem (DSS) supports eight event counters formonitoring performance and software can program each counter to monitorany of the defined performance event. Performance events are forinterface between the DDR controller and the PHY, interface between theDDR Controller and the CHI interconnect, or within the DDR Controller.Additionally DSS also supports two fixed performance event counters, onefor number of ddr reads and other for ddr writes.This patch add basic support for these performance monitoring eventson CN10k.Signed-off-by: Bharat Bhushan Reviewed-by: Bhaskara Budiredla Link: https://lore.kernel.org/r/20220211045346.17894-3-bbhushan2@marvell.comSigned-off-by: Will Deacon List of files: /linux-6.15/drivers/perf/Makefile

036a7584 - drivers: perf: Add LLC-TAD perf counter support

Mon, 15 Nov 2021 04:35:05 +0000

drivers: perf: Add LLC-TAD perf counter supportThis driver adds support for Last-level cache tag-and-data unit(LLC-TAD) PMU that is featured in some of the Marvell's CN10Kinfrastructure silicons.The LLC is divided into 2N slices distributed across N Mesh tilesin a single-socket configuration. The driver always configures thesame counter for all of the TADs. The user would end up effectivelyreserving one of eight counters in every TAD to look across all TADs.The occurrences of events are aggregated and presented to the userat the end of an application run. The driver does not provide a wayfor the user to partition TADs so that different TADs are used fordifferent applications.The event counters are zeroed to start event counting to avoid anyrollover issues. TAD perf counters are 64-bit, so it's not currentlypossible to overflow event counters at current mesh and corefrequencies.To measure tad pmu events use perf tool stat command. For instance:perf stat -e tad_dat_msh_in_dss,tad_req_msh_out_any perf stat -e tad_alloc_any,tad_hit_any,tad_tag_rd Signed-off-by: Bhaskara Budiredla Link: https://lore.kernel.org/r/20211115043506.6679-2-bbudiredla@marvell.comSigned-off-by: Will Deacon List of files: /linux-6.15/drivers/perf/Makefile

53c218da - driver/perf: Add PMU driver for the ARM DMC-620 memory controller

Wed, 04 Nov 2020 19:30:43 +0000

driver/perf: Add PMU driver for the ARM DMC-620 memory controllerDMC-620 PMU supports total 10 counters which each isindependently programmable to different events and canbe started and stopped individually.Currently, it only supports ACPI. Other platforms feel free to test and addsupport for device tree.Usage example: #perf stat -e arm_dmc620_10008c000/clk_cycle_count/ -C 0 Get perf event for clk_cycle_count counter. #perf stat -e arm_dmc620_10008c000/clkdiv2_allocate,mask=0x1f,match=0x2f, incr=2,invert=1/ -C 0 The above example shows how to specify mask, match, incr, invert parameters for clkdiv2_allocate event.Reviewed-by: Robin Murphy Signed-off-by: Tuan Phan Link: https://lore.kernel.org/r/1604518246-6198-1-git-send-email-tuanphan@os.amperecomputing.comSigned-off-by: Will Deacon List of files: /linux-6.15/drivers/perf/Makefile

0ba64770 - perf: Add Arm CMN-600 PMU driver

Fri, 18 Sep 2020 13:28:38 +0000

perf: Add Arm CMN-600 PMU driverInitial driver for PMU event counting on the Arm CMN-600 interconnect.CMN sports an obnoxiously complex distributed PMU system as part ofits debug and trace features, which can do all manner of things likesampling, cross-triggering and generating CoreSight trace. This drivercovers the PMU functionality, plus the relevant aspects of watchpointsfor simply counting matching flits.Tested-by: Tsahi Zidenberg Tested-by: Tuan Phan Signed-off-by: Robin Murphy Signed-off-by: Will Deacon List of files: /linux-6.15/drivers/perf/Makefile

9a66d36c - drivers/perf: imx_ddr: Add DDR performance counter support to perf

Wed, 01 May 2019 18:43:29 +0000

drivers/perf: imx_ddr: Add DDR performance counter support to perfAdd DDR performance monitor support for iMX8QXP. The PMU consists of 3programmable event counters and a single dedicated cycle counter.Example usage: $ perf stat -a -e \ imx8_ddr0/read-cycles/,imx8_ddr0/write-cycles/,imx8_ddr0/precharge/ ls- or - $ perf stat -a -e \ imx8_ddr0/cycles/,imx8_ddr0/read-access/,imx8_ddr0/write-access/ lsOther events are supported, and advertised via perf list.Reviewed-by: Andrey Smirnov Signed-off-by: Frank Li [will: rewrote commit message/kconfig and used #defines for dev/cpuhp names]Signed-off-by: Will Deacon List of files: /linux-6.15/drivers/perf/Makefile